instruction set

1. 8085 Instruction Set 1
8085 Instruction Set

2. 8085 Instruction Set 2

3. Instruction Format
 Size of instruction
 Instruction : 2parts
opcode – task to be performed
operand – 8/16 bit data/address, internal register
 1 byte instruction : OPCODE
MOV C,A
 2 byte instruction : OPCODE 8-bit data/address
MVI D,#F1
 3 byte instruction : OPCODE low byte data/address high byte data/address
JMP 2084
8085 Instruction Set 3

4. Addressing Modes -Types
 Method of specifying data to be operated by the
instruction – ADDRESSING
 Intel 8085 uses the following addressing modes:
1. Direct Addressing Mode
2. Register Addressing Mode
3. Register Indirect Addressing Mode
4. Immediate Addressing Mode
5. Implied Addressing Mode
8085 Instruction Set 4

5. Direct Addressing Mode
 The address of the operand (data) is given in the
instruction itself.
LDA 2500 H
Load the contents of memory location 2500 H in
accumulator.
 LDA is the operation.
 2500 H is the address of source.
 Accumulator is the destination.

6. Register Addressing Mode
 Instruction specifies the register in which data is
available.
MOV A, B
Move the contents of register B to A
 MOV is the operation.
 B is the source of data.
 A is the destination

7. Register Indirect Addressing
Mode
 In this mode, the address of operand is specified by a
register pair.
MOV A, M
Move data from memory location specified by H-L
pair to accumulator.
 MOV is the operation.
 M is the memory location specified by H-L register pair.
 A is the destination.

8. Immediate Addressing Mode
 In this mode, the operand is specified within the
instruction itself.
MVI A, 05 H
Move 05 H in accumulator
 MVI is the operation.
 05 H is the immediate data (source).
 A is the destination.

9. Implied Addressing Mode
 If address of source of data as well as address of
destination of result is fixed, then there is no need to give
any operand along with the instruction.
CMA
Complement accumulator
 CMA is the operation.
 A is the source.
 A is the destination.

10. 8085 Instruction Set 10

11. 8085 Instruction Set 11

12. 8085 Instruction Set 12
• No flags are affected
• Register addressing mode
•1 byte instruction
• MOV B,M – Indirect addressing

13. 8085 Instruction Set 13
• No flags are affected
• 2 byte instruction
• Immediate addressing mode
• MOV M,57 – Indirect addressing or immediate addressing

14. 8085 Instruction Set 14
• No flags are affected
• 3 byte instruction
• Direct addressing mode

15. 8085 Instruction Set 15
• No flags are affected
• one byte instruction
• Register indirect addressing mode

16. 8085 Instruction Set 16
• No flags are affected
• 3 byte instruction
• Immediate addressing mode

17. 8085 Instruction Set 17
• No flags are affected
• 3 byte instruction
•Direct addressing mode

18. 8085 Instruction Set 18
• No flags are affected
• 3 byte instruction
• Direct addressing mode

19. 8085 Instruction Set 19
• No flags are affected
• Register indirect addressing mode

20. 8085 Instruction Set 20
• No flags are affected
• 3 byte instruction
•Direct addressing mode

21. 8085 Instruction Set 21
• No flags are affected
• 1 byte instruction
• Implied addressing mode

22. 8085 Instruction Set 22
• No flags are affected
• 1 byte instruction
• Implied addressing mode

23. 8085 Instruction Set 23
• No flags are affected
• 1 byte instruction
• Implied addressing mode

24. 8085 Instruction Set 24
• No flags are affected
• 1 byte instruction
• Implied addressing mode

25. 8085 Instruction Set 25
• No flags are affected
• 1 byte instruction
• Register Indirect addressing mode

26. 8085 Instruction Set 26
• No flags are affected
• 1 byte instruction
• Register Indirect addressing mode

27. 8085 Instruction Set 27
• No flags are affected
• 2 byte instruction
• Direct addressing mode

28. 8085 Instruction Set 28
• No flags are affected
• 2 byte instruction
• Direct addressing mode

29. 8085 Instruction Set 29

30. 8085 Instruction Set 30

31. 8085 Instruction Set 31

32. 8085 Instruction Set 32
• All flags are affected
• Register addressing mode
• One byte Instruction
• ADD M is Indirect addressing mode.

33. 8085 Instruction Set 33
• All flags are affected
• Register addressing mode
• One byte Instruction
• ADC M is Indirect addressing mode.

34. 8085 Instruction Set 34
• All flags are affected
• Two byte Instruction.
• Immediate addressing mode

35. 8085 Instruction Set 35
• All flags are affected
• Two byte Instruction.
• Immediate addressing mode

36. 8085 Instruction Set 36
• All flags are affected
• Two byte Instruction.
• Immediate addressing mode

37. 8085 Instruction Set 37
• All flags are affected
• One byte Instruction.
• Register addressing mode
• SUB M is Indirect addressing mode.

38. 8085 Instruction Set 38
• All flags are affected
• One byte Instruction.
• Register addressing mode
• SBB M is Indirect addressing mode.

39. 8085 Instruction Set 39
• All flags are affected
• Two byte Instruction.
• Immediate addressing mode

40. 8085 Instruction Set 40
• All flags are affected
• Two byte Instruction.
• Immediate addressing mode

41. 8085 Instruction Set 41
• All flags are affected except carry flag.
• One byte Instruction.
• Register addressing mode
• INR M is Indirect addressing mode.

42. 8085 Instruction Set 42
• No flags are affected
• One byte Instruction.
• Register addressing mode

43. 8085 Instruction Set 43
• All flags are affected except carry flag.
• One byte Instruction.
• Register addressing mode
• DCR M is Indirect addressing mode.

44. 8085 Instruction Set 44
• No flags are affected
• One byte Instruction.
• Register addressing mode

45. 8085 Instruction Set 45

46. 8085 Instruction Set 46
 PSW (Program Status word)
 - Flag unaffected
 * affected
 0 reset
 1 set
 S Sign (Bit 7)
 Z Zero (Bit 6)
 AC Auxiliary Carry (Bit 4)
 P Parity (Bit 2)
 CY Carry (Bit 0)

47. 8085 Instruction Set 47

48. 8085 Instruction Set 48

49. 8085 Instruction Set 49

50. 8085 Instruction Set 50

51. 8085 Instruction Set 51
• All flags are affected.
• One byte Instruction.
• Register addressing mode
• CMP M is Indirect addressing mode.

52. 8085 Instruction Set 52

53. 8085 Instruction Set 53
• All flags are affected.
• Two byte Instruction.
• Immediate addressing mode

54. 8085 Instruction Set 54

55. 8085 Instruction Set 55
• All other flags are affected.
• One byte Instruction.
• Register addressing mode
• ANA M is Indirect addressing mode.

56. 8085 Instruction Set 56
• All other flags are affected.
• Two byte Instruction.
• Immediate addressing mode

57. 8085 Instruction Set 57
• All other flags are affected.
• One byte Instruction.
• Register addressing mode
• ORA M is Indirect addressing mode.

58. 8085 Instruction Set 58
• All other flags are affected.
• Two byte Instruction.
• Immediate addressing mode

59. 8085 Instruction Set 59
• All flags are affected.
• One byte Instruction.
• Register addressing mode
• XRA M is Indirect addressing mode.

60. 8085 Instruction Set 60
• All other flags are affected.
• Two byte Instruction.
• Immediate addressing mode

61. 8085 Instruction Set 61
• Only carry flag is affected.
• One byte Instruction.
• Implied addressing mode

62. 8085 Instruction Set 62

63. 8085 Instruction Set 63

64. 8085 Instruction Set 64

65. 8085 Instruction Set 65

66. 8085 Instruction Set 66

67. 8085 Instruction Set 67

68. 8085 Instruction Set 68

69. 8085 Instruction Set 69

70. 8085 Instruction Set 70

71. 8085 Instruction Set 71

72. 8085 Instruction Set 72

73. 8085 Instruction Set 73

74. 8085 Instruction Set 74

75. 8085 Instruction Set 75
 PSW (Program Status word)
 - Flag unaffected
 * affected
 0 reset
 1 set
 S Sign (Bit 7)
 Z Zero (Bit 6)
 AC Auxiliary Carry (Bit 4)
 P Parity (Bit 2)
 CY Carry (Bit 0)

76. 8085 Instruction Set 76

77. 8085 Instruction Set 77

78. 8085 Instruction Set 78

79. 8085 Instruction Set 79

80. 8085 Instruction Set 80

81. 8085 Instruction Set 81

82. 8085 Instruction Set 82

83. 8085 Instruction Set 83

84. 8085 Instruction Set 84

85. 8085 Instruction Set 85

86. 8085 Instruction Set 86

87. 8085 Instruction Set 87

88. 8085 Instruction Set 88

89. 8085 Instruction Set 89

90. 8085 Instruction Set 90

91. 8085 Instruction Set 91

92. 8085 Instruction Set 92
 circular Left shift

93. 8085 Instruction Set 93
 circular right shift

94. 8085 Instruction Set 94

95. 8085 Instruction Set 95

96. 8085 Instruction Set 96

97. 8085 Instruction Set 97

98. 8085 Instruction Set 98

99. 8085 Instruction Set 99

100. 8085 Instruction Set 100

101. 8085 Instruction Set 101

102. 8085 Instruction Set 102

103. 8085 Instruction Set 103

104. 8085 Instruction Set 104

105. 8085 Instruction Set 105

106. 8085 Instruction Set 106

107. 8085 Instruction Set 107
Summary – Data transfer
 MOV Move
 MVI Move Immediate
 LDA Load Accumulator Directly from Memory
 STA Store Accumulator Directly in Memory
 LHLD Load H & L Registers Directly from
Memory
 SHLD Store H & L Registers Directly in
Memory

108. 8085 Instruction Set 108
Summary Data transfer
 An 'X' in the name of a data transfer instruction implies that it
deals with a register pair (16-bits);
 LXI Load Register Pair with Immediate data
 LDAX Load Accumulator from Address in Register Pair
 STAX Store Accumulator in Address in Register Pair
 XCHG Exchange H & L with D & E
 XTHL Exchange Top of Stack with H & L

109. 8085 Instruction Set 109
Summary - Arithmetic Group
 Add, Subtract, Increment / Decrement data in registers or memory.
 ADD Add to Accumulator
 ADI Add Immediate Data to Accumulator
 ADC Add to Accumulator Using Carry Flag
 ACI Add Immediate data to Accumulator Using Carry
 SUB Subtract from Accumulator
 SUI Subtract Immediate Data from Accumulator
 SBB Subtract from Accumulator Using Borrow (Carry) Flag
 SBI Subtract Immediate from Accumulator
Using Borrow (Carry) Flag
 INR Increment Specified Byte by One
 DCR Decrement Specified Byte by One
 INX Increment Register Pair by One
 DCX Decrement Register Pair by One
 DAD Double Register Add; Add Content of Register Pair to H & L
Register Pair

110. 8085 Instruction Set 110
Summary Logical Group
 This group performs logical (Boolean) operations on data in
registers and memory and on condition flags.
 These instructions enable you to set specific bits in the
accumulator ON or OFF.
 ANA Logical AND with Accumulator
 ANI Logical AND with Accumulator Using Immediate
Data
 ORA Logical OR with Accumulator
 OR Logical OR with Accumulator Using Immediate
Data
 XRA Exclusive Logical OR with Accumulator
 XRI Exclusive OR Using Immediate Data

111. 8085 Instruction Set 111
 The Compare instructions compare the content of an 8-bit value
with the contents of the accumulator;
 CMP Compare
 CPI Compare Using Immediate Data
 The rotate instructions shift the contents of the accumulator one bit
position to the left or right:
 RLC Rotate Accumulator Left
 RRC Rotate Accumulator Right
 RAL Rotate Left Through Carry
 RAR Rotate Right Through Carry
 Complement and carry flag instructions:
 CMA Complement Accumulator
 CMC Complement Carry Flag
 STC Set Carry Flag

112. 8085 Instruction Set 112
Summary - Branch Group
 Unconditional branching
 JMP Jump
 CALL Call
 RET Return
 Conditions
 NZ Not Zero (Z = 0)
 Z Zero (Z = 1)
 NC No Carry (C = 0)
 C Carry (C = 1)
 PO Parity Odd (P = 0)
 PE Parity Even (P = 1)
 P Plus (S = 0)
 M Minus (S = 1)
 Conditional branching

113. 8085 Instruction Set 113
Summary - Stack
 PUSH Push Two bytes of Data onto the Stack
 POP Pop Two Bytes of Data off the Stack
 XTHL Exchange Top of Stack with H & L
 SPHL Move content of H & L to Stack Pointer

114. 8085 Instruction Set 114
I/0 instructions
 IN Initiate Input Operation
 OUT Initiate Output Operation

115. 8085 Instruction Set 115
Summary -Machine Control instructions
 EI Enable Interrupt System
 DI Disable Interrupt System
 HLT Halt
 NOP No Operation