Hsien-Hsin Sean Lee, Ph.D.

computer architecture logic design dram sram logic synthesis memory hierarchy caches risc program execution state machine fsm sequential logic finite state machine combinational logic logic minimization cmos nor nand inverter coherence cmp disk prefetch p6 microarchitecture vliw epic cisc program control data path microcode control flow instruction execution program counter mips instruction set architecture isa rom bit cells memory registers toggle celled counter flip-flops register shifter multiplier barrel shifter subtractor adder parity checker comparator gate encoder decoder timing diagram mux multiplexor mixed logic quinn-mccluskey algorithm karaugh map k-map canonical function sop pos demorgan law boolean algebra xor logic gates switch and switches hex number conversion binary computer engineering explicit parallel instruction computing data speculation static scheduling directory-based cohference snooping coherence multiprocessor snoop protocol directory based protocol parallel architecture smp chip multiprocessor symmetric multiprocessor chip multiprocessors many core multicore pentium 4 pentium pro raid memory architecture netburst rob rat register renaming reorder buffer cdc6600 scoreboard tomasulo algorithm ibm360/91 instruction fetch unit processor branch predictors speculation performance ilp instruction level parallelism