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LUT Optimization forMemory-Based ComputationByN.Tharun KumarS.VijayCH.John WilliamsGuided By:Tara Sai Kumar
Objective:To design LUT optimization for memory basedcomputation.Design of APC-OMS combined LUT design forthe multiplica...
Abstract:We have APC and OMS techniques for lookuptable .These techniques reduce LUT size by a factortwo.The modified A...
Introduction:LUT optimization is a technique used in:Digital Signal ProcessingMultiplication and Data Selection Process....
APC for LUT OptimizationModified OMS for LUT Optimization
Conventional LUT-based multiplier
ToolsXilinxVHDL
Proposed: A different form of APC and combined thatwith a modified form of the OMS scheme forefficient memory based multi...
Block Diagram:
BenefitsAPC and OMS techniques reduce LUT by afactor of 2.Size of LUT is reduced to one by fourth of theconventional.Fo...
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Lut optimization for memory based computation

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Lut optimization for memory based computation

  1. 1. LUT Optimization forMemory-Based ComputationByN.Tharun KumarS.VijayCH.John WilliamsGuided By:Tara Sai Kumar
  2. 2. Objective:To design LUT optimization for memory basedcomputation.Design of APC-OMS combined LUT design forthe multiplication of W-bit fixed coefficient Awith 5-bit input X.
  3. 3. Abstract:We have APC and OMS techniques for lookuptable .These techniques reduce LUT size by a factortwo.The modified APC and OMS ,combineapproach provides reduction in LUT size toone by fourth of conventional.
  4. 4. Introduction:LUT optimization is a technique used in:Digital Signal ProcessingMultiplication and Data Selection Process.It is used to decrease size and the memoryrequired with the LUT without degrading itsperformance.
  5. 5. APC for LUT OptimizationModified OMS for LUT Optimization
  6. 6. Conventional LUT-based multiplier
  7. 7. ToolsXilinxVHDL
  8. 8. Proposed: A different form of APC and combined thatwith a modified form of the OMS scheme forefficient memory based multiplication.
  9. 9. Block Diagram:
  10. 10. BenefitsAPC and OMS techniques reduce LUT by afactor of 2.Size of LUT is reduced to one by fourth of theconventional.For 16-bit and 32-bit word sizes, respectively,it offers more than 30% and 50% of saving inarea-delay product over the correspondingCSD multipliers.
  11. 11. Thank You

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