Webinar presentation on AUTOSAR Multicore Systems

Webinar
AUTOSAR Multicore Systems

© KPIT Technologies Limited
Your Speaker for the day!
3/21/20142
 Manager Business Development
 Based out of Stuttgart, Germany
 Responsible for KPIT Activities in Stuttgart Region
 Extensive experience in OSEK and AUTOSAR
Helmar Kuder
All images, Trademarks and otherwise copyright material belong to its respective owners
 AUTOSAR Expert at KPIT
 Based out of Germany
 Responsible for AUTOSAR Products at KPIT
 Extensive experience in AUTOSAR Methodology
Sugandar Swetharanyam

Agenda
• Motivation
• AUTOSAR Multicore
• Outlook
• Questions & Answers
• Summary
3/21/20143

Motivation: Next Generation Technologies
Complex functionality implemented in Software  need for higher computational abilities
Main use cases for multicore ECUs can be
• Dealing with resource demanding applications
• Decreasing complexity of architecture
• Improving the safety
3/21/20144
Adaptive Cruise Control
Forward Collision Alert
Blind Spot
DetectionLane Keeping Assist
Infotainment
Systems

Motivation: Next Generation Technologies
Dealing with resource demanding applications: Need more computing power
Increase CPU frequency?
• higher frequency  higher power consumption
 more heat  need for enhanced cooling
• higher frequency  chip design becomes more complicated
– cache design
– execution queue (out of order execution)
– branch prediction
3/21/20145

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49
Amdahl's law
60% 70% 80% 90% 95%
Motivation: Parallelization constraints
How efficient is parallelization of software / multicore?
Amdahl's law may be used “to find the maximum
expected improvement to an overall system when only
part of the system is improved.” [1]
Speedup = Speed of the Multicore System compared
to a Single Core System.
Key factor: Parallel portion
of the code that may
be executed concurrently.
Example: If 90% of the code
may be executed in parallel,
even 25 cores would only
result in a speedup of
less than 8 times
of a single core.
[1] www.wikipedia.org/wiki/Amdahl's_law
3/21/20146
Speedup Number of cores
Parallel portion
7.35
25

Motivation: Operational Modes
• The cores act as redundant cores
• Used in safety critical applications
Lock Step Mode
• All cores share the load and run parallel
• Data flow of software needs to be
analyzed for best multicore architecture
• Improve multicore efficiency by
partitioning the software across cores with
minimal interaction
• Parallel processing mode can also be used
in safety critical application with carefully
designed software architecture
Parallel Processing Mode
3/21/20147
Usually the Multicore is utilized in two modes, either Lock Step Mode, or Parallel Processing Mode

Motivation: Software Challenges with Multicore migration
Just changing the CPU from single core
to multicore does not solve the problem
 it poses multiple software challenges
3/21/20148
AUTOSAR
offers an efficient
multicore software architecture
to cater to these challenges!
Multicore
Concurrent
Data Access
Deadlocks
Scheduling
Challenges
Memory
Management
Functionality
Partitioning
Parallelization
Startup /
Shutdown
sequence

AUTOSAR Multicore: Master-Slave Concept
3/21/20149
Extended RTE
BswM
EcuM
OS
START UP ORDER
SHUT DOWN ORDER
Master Core Slave Core 0 Slave Core n
EcuM
OS
EcuM
OSMCAL
BSW &
ECU Abstr. Layer
• Master Core
contains complete
BSW
• Master Core
controls Start Up /
Shut Down
sequence

AUTOSAR Multicore: Master Satellite Concept
 Master Satellite Concept in Basic Software (BSW)
 Modules that need to be accessed in different BSW partitions can be implemented
using the master/satellite pattern.
 The partitioning is implementation specific & the communication between master and
satellite is not standardized.
 E.g. BSW can be partitioned in such a way that a FlexRay cluster is on one core and a CAN
cluster on a different core.
 COM is also split across cores. The two COM modules need to be synchronized in this
case. One of the COM modules might act as the master COM and it coordinates with the
satellite COM on the other core.
3/21/201410
Clusters of functions on each core
Effective mechanism to implement functional safety by hard partitioning

AUTOSAR Multicore: Master Satellite Concept
With Master Satellite concept the BSW can be partitioned across cores based on
functionality.
3/21/201411
RTE (Master)
MCAL
Microcontroller
CDD
ABSTRACTION LAYER
I/O HW
Abstraction
Communication
Services
(Master)
CDD
Memory
Services
Application Layer
Core0 Core1
System Service I/O HW
Abstracti
on
I/O
Drivers
Communication
Services
(Satellite)
OS
ECU State
Manager
BSW
Mode
Manager
SWC1 SWC3SWC2 SWC4 SWC5
RTE (Satellite)

AUTOSAR Multicore: Provision for safety & Data exchange
 AUTOSAR architecture provides a mechanism where the allocation of BSW modules to
different BSW partitions allows for both enhanced functional safety and increased
performance.
 It allows integration of independent applications, possibly with different ASILs, on the
same partitioned microcontroller.
 To cater to challenges of cross-core data access & data transfer, AUTOSAR Operating
System is enhanced to support
 Spinlocks
 Inter-OS-Application Communicator (IOC)
3/21/201412

AUTOSAR Multicore: Spinlock
 A new mechanism is needed to
support mutual exclusion for TASKS
on different cores.
 Spinlock locks a variable across core,
so that no two cores may access the
same variable at the same time
 Similar to resource concept – but at
core level
 A spinlock is a busy waiting
mechanism that polls a (lock) variable
until it becomes available.
3/21/201413
To avoid deadlocks, if spinlocks are to be nested,
a unique order has to be defined in which they can only be taken.
Deadlock
Possibility
GetSpinLock(A) Do Something GetSpinLock(B) SpinLock for B
GetSpinLock(B) Do Something GetSpinLock(A) SpinLock for A
Core0Core1

AUTOSAR Multicore: Inter-OS-Application Communicator (IOC)
 The IOC provides communication services which can be accessed by
clients which need to communicate across cores & memory protection
boundaries on the same ECU
 Features
 Provides Sender – Receiver communication
 Supports queued (first-in-first-out) &
unqueued (last-is-best) communication
 Notification of receiver
 Allows the transfer of one data item per
atomic communication operation
 Conversion of endianness
between cores is not supported
3/21/201414

AUTOSAR Multicore: Functional Safety Aspects
 Memory Protection (Multicore)
– Core specific Memory Protection Unit (MPU) and Memory protection is available in
microcontroller
– Bus specific MPU and Memory protection is available in microcontroller
 IOC data communication for safety (IOC multicore)
– IOC will use a shared memory between the core to communicate data
– IOC will use supervisor mode to copy in shared memory of core using spinlock
– OS-IOC combination will be safety relevant in multicore system
3/21/201415

Outlook
3/21/201416
Hardware
How will the tools & software evolve?
Migration from
Single Core to
Multicore
Data Flow analysis
for Multicore
Data buffer
optimization
Scheduling
analysis
Automotive Industry is
expected to be one of the major
industries to be impacted by
the adoption of multicore CPU
Source: IDC, 2012

Company Info KPIT: YUCCA Tool helps in multicore migration
3/21/201417
Source Code
Automatic
Parallelization
Tool (YUCCA)
Parallelized
Source Code
Task & loop
parallelization
Completely
automated
dependency
analysis
No manual
intervention
Source to source
conversion
Optimum use of
multicore hardware
Static analysis with
profiling

Company Info KPIT: AUTOSAR Credentials
3/21/201418
9 Years of delivering AUTOSAR Solutions
20+ Active Engagements with leading OEMs
5 OEMs have approved R4.0.3 KPIT AUTOSAR BSW Stack
Premium member of AUTOSAR since 2005
KPIT’s Basic Software available for AUTOSAR R2.x, R3.x, R4.x

Company Info KPIT: AUTOSAR Operating System – Microcontroller Journey snapshot
3/21/201419
Scalable and proven KPIT AUTOSAR Operating System!
LM3S8962 MPC566xG
MPC560xS
MPC560xB
MB96F380
MPC564xL
V850E2Sx4
V850E2Px4
TX03*
V850ESFx3
TC275TE*
V850E2Fx4 MPS57xxP
MPC5646C
RL78
RH850
2008 2009 2010 2011 2012 2013
*Multicore AUTOSAR Operating System
MPS57xxR*

Summary
• Multicore microcontrollers are gaining more popularity in the automotive ecosystems
to meet its computation requirements
• Parallelization is the need of the hour
• Parallelization poses multiple challenges to the ECU software architecture
• AUTOSAR software multicore architecture caters to these multiple issues in software
migration to multicore CPUs
3/21/201420
KPIT offers a proven AUTOSAR multicore solution with comprehensive services!
Reach out to us – autosar@kpit.com

Webinar presentation on AUTOSAR Multicore Systems

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Webinar presentation on AUTOSAR Multicore Systems