Flyback Converters v4

Development of SiC-Based PEBB 1000
July 28, 2016
PWM DC-DC
Flyback Converters
Pedro Campos Fernandes
Jun Wang

1. One-Switch Flyback Converter
 Advantages
 Simplicity: fewer semiconductor and magnetic components
 Low cost
 Disadvantages
 Resonance caused by the leakage inductance and the device junction capacitances
 High-frequency ringing and EMI
July 28, 2016 2Development of SiC-Based PEBB 1000

2. Ideal One-Switch Flyback Converter
 Circuit components:
 Q: Ideal MOSFET Switch
 D: Ideal Rectifier Diode
 C: Output Capacitance
 RL: Load Resistance
 Vin: Input Voltage Source
 I1: Input Current (primary)
 LM: Magnetizing Inductance
 IM: Magnetizing Current
 I2: Diode Current (secondary)
 T: Ideal Flyback Transformer

2. Ideal One-Switch Flyback Converter
 Simulation model:

2.1. CCM Operation
2.1.1. First Stage: DTS
 Q is ON
 D is OFF
 Energy from the DC source
is stored in LM

2.1. CCM Operation
2.1.2. Second Stage: (1-D)TS
 Q is OFF
 D is ON
 Transformer voltage reverses
forward-biasing the rectifier diode
and delivering energy to the output

3. Non-Ideal One-Switch Flyback Converter
 Q: MOSFET Switch
 D: Rectifier Diode
 T: Flyback Transformer
 CJ: Diode Junction Capacitance
 CDS: Drain-Source Capacitance
 Lleak: Leakage Inductance

3. Non-Ideal One-Switch Flyback Converter

3.1. CCM Operation
 Subinterval 1:
 Q is switching from OFF to ON
 D is switching from ON to OFF
 Switch transient ringing

3.1. CCM Operation
 Subinterval 2:
 Q is effectively ON
 D is effectively OFF
 No switch transient ringing

3.1. CCM Operation
 Subinterval 3:
 Q is switching from ON to OFF
 D is switching from OFF to ON

3.1. CCM Operation
 Subinterval 4:
 Q is effectively OFF
 D is effectively ON
 No switch transient ringing

3.2. Ideal Case vs. Parasitic Case
July 28, 2016 Development of SiC-Based PEBB 1000 13

3.2. Ideal Case vs. Parasitic Case

4. Two-Switch Flyback Converter
 Advantages
 Maximum switch voltage is clamped to the DC input voltage Vin
 Leakage inductance energy is also clamped and recycled back to the DC
input source (improve efficiency)
 Reduced switching and conduction losses

5. Non-Ideal Two-Switch Flyback Converter
 Q1,2: Symmetrical MOSFET Switches
 D1,2: Symmetrical Clamping Diodes
 D: Rectifier Diode
 T: Flyback Transformer
 CJ: Diode Junction Capacitance
 CDS1,2: Drain-Source Capacitances
 Lleak: Leakage Inductance

5. Non-Ideal Two-Switch Flyback Converter

5.1. CCM Operation
 Subinterval 1:
 Q1, Q2 are switching from OFF to ON
 D is switching from ON to OFF
 D1, D2 are OFF

5.1. CCM Operation
 Subinterval 2:
 Q1, Q2 are effectively ON
 D is effectively OFF
 D1, D2 are OFF
 No transient ringing

5.1. CCM Operation
 Subinterval 3:
 Q1, Q2 are switching from ON to OFF
 D is switching from OFF to ON
 D1, D2 are OFF
 Voltage spike

5.1. CCM Operation
 Subinterval 4:
 D is effectively ON
 D1, D2 are ON
 Switch voltages VDS1, VDS2 are clamped
to Vin

5.1. CCM Operation
 Subinterval 5:
 D is ON
 D1, D2 are switching from ON to OFF

5.1. CCM Operation
 Subinterval 6
 Q1, Q2 are effectively OFF
 D is ON
 D1, D2 are effectively OFF
 No transient ringing

5.2. One-Switch vs. Two-Switch

5.2. One-Switch x Two-Switch

5.3. Component Mismatches
 Real applications do not provide perfect symmetry
between junction capacitances and gate driver signals
 There are mismatches between these variables and
they lead to different behaviors during the converter
operation

 Two types of mismatch will be covered:
 20% mismatch on drain-source capacitance of the low side
MOSFET switch Q2 given the high side MOSFET switch Q1
as reference
 5% delay (given the period as reference) on the gate driver of
the low side MOSFET switch Q2

5.3.1. Capacitance Mismatch
 CDS1 = 120 pF and CDS2 = 144 pF
 Q1 is clamped earlier than Q2, i.e.,
D1 starts conducting earlier than D2
 Q1, Q2 voltages reach different
steady values after the ringing dies

5.3.2. Gate Drive Delay Mismatch
 DelayQ1 = 0 s and DelayQ2 = 0.17 us
 Q2 turns ON later, so Q1 will be clamped
earlier
 Q1 turns ON earlier, leading to another
clamping action during the delayed turn ON
of Q2

5.3.3. Merged Mismatch

 Possible Solutions
 Design an integrated solution with complete control circuit and
gate drive for both high side (Q1) and low side (Q2) switches
 Work with safety margins so that the circuit can still present
good performance for a certain percentage of mismatch

6. Power Losses on Flyback Converters
 Design considerations:
 Zero winding resistances (rprimary = rsecondary = 0)
 Zero leakage resistance
 The MOSFET switches and clamping diodes are considered
symmetrical to each other
 Two-Switch topology - switches model: IRF510
 100 V, 5 A, ron,max = 0.85 Ω and CDS = 60 pF
 One-Switch topology - switch model: IRF840
 500 V, 8 A, ron,max = 0.54 Ω and CDS = 120 pF
 Rectifier Diode model: MBR10100
 100 V, 10 A, VF = 0.65 V and rF = 20 mΩ with CJ = 200 pF
 Clamping Diodes model: MBR10100
 100 V, 10 A, VF = 0.65 V and rF = 20 mΩ with CJ = 0 F

6. Power Losses on Flyback Converters
 Losses presented by the design:
 Conduction Losses
 Forward Voltage Losses
 Switching Losses

6.1. Conduction Losses
6.1.1. MOSFET Switches Q1, Q2
 Since Q1, Q2 are symmetrical to each other, conduction losses will be given by:
𝑃𝑐𝑜𝑛𝑑,𝑄1 = 𝑃𝑐𝑜𝑛𝑑,𝑄2 = 𝑟𝑂𝑁,𝑄 𝐼 𝑅𝑀𝑆,𝑄
2
= 𝑟𝑂𝑁,𝑄 𝐼 𝑅𝑀𝑆,1
2
6.1.2. Rectifier Diode D3
𝑃𝑐𝑜𝑛𝑑,𝐷3 = 𝑟𝑂𝑁,𝐷3 𝐼 𝑅𝑀𝑆,𝐷3
2
= 𝑟𝑂𝑁,𝑄 𝐼 𝑅𝑀𝑆,2
2
6.1.3. Clamping Diodes D1, D2
 Since Q1, Q2 are symmetrical to each other, conduction losses will be given by:
2
2
And
𝑃𝑐𝑜𝑛𝑑,𝐷1 = 𝑃𝑐𝑜𝑛𝑑,𝐷2

6.2. Forward Voltage Losses
6.2.1. Rectifier Diode D3
 The average power dissipated by the forward voltage across the ON stage rectifier
diode is given by:
𝑃𝑓𝑜𝑟,𝐷3 = 𝑉𝑓𝑜𝑟,𝐷3 𝐼 𝑎𝑣𝑔,𝐷3
6.2.2. Clamping Diodes D1, D2
 The average power dissipated by the forward voltage across the ON stage
clamping diodes is given by:
And
𝑃𝑓𝑜𝑟,𝐷1 = 𝑃𝑓𝑜𝑟,𝐷2

6.3. Switching Losses
 Switching Losses on the MOSFET switches can be obtained by
the simplified formulation presented on [4]:
𝑃𝑠𝑤,𝑄1 =
1
2
𝑓𝑠𝑤 𝐶 𝐷𝑆1 𝑉𝐷𝑆1
2
𝑃𝑠𝑤,𝑄2 =
1
2
𝑓𝑠𝑤 𝐶 𝐷𝑆2 𝑉𝐷𝑆2
2
And
𝑃𝑠𝑤,𝑄1 = 𝑃𝑠𝑤,𝑄2 = 𝑃𝑠𝑤

6.4. Total Power Loss
 The total power loss of the circuit is given by:
𝑃𝑙𝑜𝑠𝑠 = 𝑃𝑐𝑜𝑛𝑑 + 𝑃𝑓𝑜𝑟 + 𝑃𝑠𝑤
With
𝑃𝑐𝑜𝑛𝑑 = 𝑃𝑐𝑜𝑛𝑑,𝑄1 + 𝑃𝑐𝑜𝑛𝑑,𝑄2 + 𝑃𝑐𝑜𝑛𝑑,𝐷3 + 𝑃𝑐𝑜𝑛𝑑,𝐷1 + 𝑃 𝑐𝑜𝑛𝑑,𝐷2
𝑃𝑓𝑜𝑟 = 𝑃𝑓𝑜𝑟,𝐷3 + 𝑃𝑓𝑜𝑟,𝐷1 + 𝑃𝑓𝑜𝑟,𝐷2

6.5. Results
 Initial Considerations
 The simulation time covered 0 to 0.05s
 The samples were saved on a .mat file and a reused on a MATLAB
script in order to compute the losses
 The RMS and average currents were computed considering one
switching cycle only at steady state

6.5. Results
0.064
0.353
0.433
0.849
0.874
0.074
0.355
0.042
0.470
0.924
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Condcution Losses Forward Voltage Losses Switching Losses Total Losses Efficiency
Power Losses at CCM (W)
One-Switch Two-Switch

6.5. Results
 Comparison of the performance of the converters in
CCM:
 The conduction losses slightly increased due to the presence
of more components on the two-switch topology
 The switching losses were drastically reduced
 The efficiency increased 5 %

6.5. Results
0.064
0.353
0.433
0.849
0.874
0.084
0.367
0.140
0.592
0.912
0.074
0.355
0.042
0.470
0.924
0.102
0.365
0.011
0.477
0.927
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Conduction Losses Forward Voltage Losses Switching Losses Total Losses Efficency
Power Losses at CCM and BCM (W)
One-Switch CCM One-Switch BCM Two-Switch CCM Two-Switch BCM

6.5. Results
 Comparison of the performance of the converters in
CCM vs. BCM:
 Higher conduction losses at BCM
 Lower switching losses for both topologies at BCM
 Higher efficiency for both topologies at BCM

7. Conclusion
 Does the Two-Switch Flyback Converter present a
better performance when compared to the One-Switch
topology?
Voltage across the MOSFET switches is clamped to Vin (no
high-voltage spikes)
Lower ringing effect
Lower switching losses
Higher efficiency

8. References
[1] “Improving the Performance of Traditional Flyback-Topology With Two-Switch –Approach”, J.
Pesonen; Texas Instruments
[2] “Understand Two-Switch Forward/Flyback Converters”, Y. Xi, R. Bell; National Semiconductor
[3] “Hard-Switching and Soft-Switching Two-Switch Flyback PWM DC-DC Converters and Winding
Loss due to Harmonics in High-Frequency Transformers”, D. M. Bellur, Wright State University
[4] “Two-Switch Flyback PWM DC-DC Converter in Continuous-Conduction Mode”, D. M. Bellur, M.
K. Kazimierczuk, Wright State University
[5] “Fundamentals of Power Electronics”, R. W. Erickson, D. Maksimovic, University of Colorado
Boulder
[6] “Characterization and Modeling of High-Switching-Speed Behavior of SiC Active Devices”,
Zheng Chen; Virginia Polytechnic Institute and State University
[7] “AN-9010 MOSFET Basics”, Fairchild Semiconductor
[8] “Analysis of SiC MOSFETs under Hard and Soft-Switching”, M. R. Ahmed, R. Todd, A. J.
Forsyth, The University of Manchester, UK
[9] “Power Electronics - A First Course”, N. Mohan, University of Minnesota
[10] “Development of an Isolated Flyback Converter Employing Boundary-Mode Operation and
Magnetic Flux Sensing Feedback”, M. V. Kenia, Massachusetts Institute of Technology

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