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- 1. Review of Basics of Digital Electronics 1 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Overview Introduction Logic Gates Flip Flops Registers Counters Multiplexer/ Demultiplexer Decoder/ Encoder
- 2. Review of Basics of Digital Electronics 2 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Introduction Digital Computer A computer that stores data in terms of digits (numbers) and proceeds in discrete steps from one state to the next Binary digits The states of a digital computer typically involve binary digits. A binary digit is called a bit RAM CPU O/P Device I/P Device IOP Block diagram of a digital computer
- 3. Review of Basics of Digital Electronics 3 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Logic Gates A X X = (A + B)’ B Name Symbol Function Truth Table AND A X = A • B X or B X = AB 0 0 0 0 1 0 1 0 0 1 1 1 0 0 0 0 1 1 1 0 1 1 1 1 OR A X X = A + B B I A X X = A 0 1 1 0 Buffer A X X = A A X 0 0 1 1 NAND A X X = (AB)’ B 0 0 1 0 1 1 1 0 1 1 1 0 NOR 0 0 1 0 1 0 1 0 0 1 1 0 XOR Exclusive OR A X = A B X or B X = A’B + AB’ 0 0 0 0 1 1 1 0 1 1 1 0 A X = (A B)’ X or B X = A’B’+ AB 0 0 1 0 1 0 1 0 0 1 1 1 XNOR Exclusive NOR or Equivalence A B X A B X A X A B X A B X A B X A B X
- 4. Review of Basics of Digital Electronics 4 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Flip Flops Characteristics - 2 stable states - Memory capability - Operation is specified by a Characteristic Table The Storage elements employed in clocked sequential circuits, capable of storing one bit of information, are called Flip Flops The most common types of flip flops are SR (Set Reset) D (Data) JK T (Toggle)
- 5. Review of Basics of Digital Electronics 5 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Clocked Flip Flops In a large digital system with many flip flops, operations of individual flip flops are required to be synchronized to a clock pulse. Otherwise, the operations of the system may be unpredictable. S Q c R Q’ S Q c R Q’ Clock pulse allows the flip flop to change state only when there is a clock pulse appearing at the c terminal (as shown in fig). Edge Triggered Flip Flops operates when operates when clock is high clock is low State transition occurs at the rising edge or falling edge of the clock pulse
- 6. Review of Basics of Digital Electronics 6 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT S Q c R Q’ S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) Flip Flop GraphicalSymbol Characteristic Table SR (Set Reset) D (Data) D Q(t+1) 0 0 1 1 J Q C K Q' Flip Flops
- 7. Review of Basics of Digital Electronics 7 Lecture 1 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT J Q c R Q’ S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 indeterminate (forbidden) Flip Flop GraphicalSymbol Characteristic Table J-K T (Toggle) T Q c T Q(t+1) 0 Q(t) 1 Q’(t) J Q C K Q' J K Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 Q’(t) Flip Flops

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