Yerravati Rahul is seeking a position in the IT industry that offers professional growth. He has a B.Tech in ECE from JNTU-Hyderabad from 2010-2014 and scored 63%. His technical skills include Java, HTML, Oracle, and more. He has participated in workshops on CAPTCHA implementation, cyber security, and solar mobile chargers. For projects, he designed an alarm clock using HDL and worked on a prefix adder for high speed computation. He was born in 1992 in Hyderabad and speaks English and Telugu.

1. Yerravati Rahul
Email: rahul.leader6@gmail.com Mobile: +91-9581582076
OBJECTIVE
Seeking a position to utilize my skills and abilities in the Information Technology industry
that offers professional growth while being resourceful, innovative and flexible.
EDUCATIONAL QUALIFICATIONS
TECHNICAL SKILLS
Operating System : Windows.
Languages : Java.
Primary Skill : JDBC.
Web Technologies : HTML, Servlets, JSP.
Frameworks : Hibernate, Spring.
RDBMS : Oracle.
Scripting Language : JavaScript.
IDE/Tools : Eclipse, Maven, Log4j.
Servers : Apache Tomcat, Weblogic.
ACADEMIC ACHIEVEMENTS
• Participated in Workshop on “CAPTCHA IMPLEMENTATION AND
WEBHOSTING”
• Participated in Workshop on “CYBER SECURITY AND MALWARE
ANALYSIS”(LEVEL-1)
DEGREE BOARD/ UNIVERSITY PERIOD OF STUDY PERCENTAGE
B.Tech(ECE) JNTU-Hyderabad 2010-2014 63%
Intermediate Board of Intermediate 2008-2010 84%
S.S.C Board of Secondary Education 2007-2008 85%

2. • Participated in paper on “SOLAR MOBILE CHARGER” in HITS College.
PERSONAL SKILLS
• Can easily mingle with others.
• Ability to work under pressure in a demanding environment.
Mini Project
Title: DESIGN AND TESTING OF ALARAM CLOCK USING HDL.
Description: This was a project designed by using full custom methodologies like
OVM(Open Verification Methodology).The schematic of Alarm clock has six modules like
Timing Generator, Key Register, Alarm Register, Counter, Alarm Controller, Display Driver.
And we verified the functionality and simulation of each module in this project.
Main Project
Title: PREFIX ADDER FOR HIGH SPEED COMPUTATION APPLICATIONS.
Project Duration: 3 months
Description: Researchers continued to be focused on improving the Power Delay
performance of the adder and Parallel prefix adders are to have the best performance and this
adder is most flexible and widely used for Binary addition. Prefix adders are based on
parallel prefix circuit theory and provides a wide range of design trade offs between delay,
area and wiring complexity.
APPLICATIONS: It is used in High speed Microprocessors Design and mostly used for Ultra
Power Designs.
Date of birth : 11-06-1992
Father’s name : Y.Madhu
Languages known : English, Telugu
Address : H.NO:3-5-154,
Krishna Nagar Colony,
Moula-ali, Hyderabad-500040.
I, hereby declare that all the information provided above is true to the best of my Knowledge
and belief.
Place: Hyderabad,
Date: Signature
ACADEMIC PROJECT DETAILS
PERSONAL INFORMATION

3. [ Yerravati Rahul]