Efficient VLSI Implementation of the AES Algorithm
1. EFFICIENT VLSI
IMPLEMENTATION OF THE
BLOCK CIPHER RIJNDAEL
ALGORITHM
R.V.S COLLEGE OF ENGINEERING &
TECHNOLOGY
DINDIGUL
AJAL.A.J & VELMURUGAN.S
DEPT OF ECE
3. INTRODUCTION
• The cipher Rijndael is one of the five finalists of
the Advanced Encryption Standard (AES)
• The algorithm has been designed by Joan Daemen
and Vincent Rijmen
• It is a Block cipher.
• The hardware implementation with 128-bit blocks
and 128-bit keys is presented.
• VLSI optimizations of the Rijndael algorithm are
discussed and several hardware design
modifications and techniques are used, such as
memory sharing and parallelism.
4.
5. Critical communications
private(confidentiality)
Know who we are dealing with (identity)
Guarantee messages unaltered (integrity)
Assert rights over content use (authorization)
All critical systems up-and-
running(availability)
Critical N/W Security Elements
6. The Rijndael Chip
AES 128bit implementation
The Rijndael chip
Selected by AES (Advanced
Encryption
Standard, part of NIST)
as the new private-key
encryption standard.
7. Add Round Key
Sub Bytes
Shift Rows
Mix Columns
Add Round Key
Sub Bytes
Shift Rows
Mix Columns
Add Round Key
Sub Bytes
Shift Rows
Add Round Key
Add Round Key
Inv Sub Bytes
Inv Shift Rows
Inv Mix Columns
Add Round Key
Inv Sub Bytes
Inv Shift Rows
Inv Mix Columns
Add Round Key
Inv Sub Bytes
Inv Shift Rows
Add Round Key
1
9
10
1
2
10
9
Encryption Decryption
Partition of the rounds not suited for intraround pipelining
Rijndael Algorithm – Round
9. It all starts with a key
• What is a key?
• Encryption algorithm is like a recipe for
spaghetti. Key is like the choice of sauce
that changes the end result.
Encrypt – Garble so it’s unreadable
Decrypt – Ungarble so it can be read again
Plain text
I am going to the
market
encrypt algorithm – add
x letters
key - 2 hard to read,
UNLESS you know
the key
Cipher text
K co iqkpi vq vjg
octmgv
Encrypting Text
Plain text
I am going to the
market
CipherText
K co iqkpi vq vjg
octmgv
decryption algorithm –
subtract x letters
key - 2
Decrypting Text
That’s encryption!
18. FUTURE
DEVELOPMENT
• For future development, estimation on the real time
required for key initialization and time for a whole
encryption should be done on the real chip.
• Research is still going on the encryptor core for higher bit
lengths.
• FPGA based solutions have shown significant speedups
compared with software based approaches
• The widespread adoption of distributed, wireless, and
mobile computing makes the inclusion of privacy,
authentication and security
• Power consumption will remain a critical factor ,especially
when cryptographic applications will move into embedded
context
19. CONCLUSION
• In this paper, a VLSI implementation for the Rijndael encryption
algorithm is presented
• The combination of security, and high speed implementation,
makes it a very good choice for wireless systems.
• The whole design was captured entirely in VHDL language
using a bottom-up design and verification methodology
• The proposed VLSI implementation of the algorithm reduces the
covered area and achieves a data throughput up to 2.18Gbit/sec.
• An optimized coding for the implementation of Rijndael
algorithm for 128 bits has been developed
• Architectural innovations like on the fly round key generation,
which facilitates simultaneous execution of sub bytes, shift rows
and mix columns and round key generation has been
incorporated in our coding.