Personal Information
Organization / Workplace
Kanata Canada
Occupation
Lead FPGA Designer
Industry
Telecom / Mobile
Website
ca.linkedin.com/in/akhailtash
About
http://about.me/Amal.Khailtash
Tags
asic
fpga
hdl
rtl
vhdl
verilog
hdvl
ovm
systemverilog
See more
- Presentations
- Documents
- Infographics
OTN for Beginners
MapYourTech
•
9 years ago
Comparison of Adders for optimized Exponent Addition circuit in IEEE754 Floating point multiplier using VHDL
IJERD Editor
•
8 years ago
Writing Parsers and Compilers with PLY
David Beazley (Dabeaz LLC)
•
13 years ago
Track f interoperable ip-delivery_ch_e ofer shragay
chiportal
•
12 years ago
Spirit20090924poly
Gary Dare
•
14 years ago
Mixing Python and Java
Andreas Schreiber
•
14 years ago
Communication between Java and Python
Andreas Schreiber
•
15 years ago
Design and Simulation Triple-DES
chatsiri
•
16 years ago
Speech Reognition Using FPGA Technology
Carlos
•
16 years ago