5. Other Registers
EFLAGS – 32 Bit Register
CFPFAFZFSFTFIFDFOFIO
PL
IO
PL
NTRFVM
Bits 1,3,5,15,22-31 are RESERVED.
18: AC, 19:VIF, 20: VIP, 21:ID
6. Details of the flags
CF – Carry Flag
Set by arithmetic instructions that generate a carry
or borrow. Also can be set, inverted and cleared with
the STC, CLC or CMC instructions respectively.
PF – Parity Flag
Set by most instructions if the least significant eight
bits of the destination operand contain an even
number of 1 bits.
7. Details of the flags
AF – Auxiliary Flag
If a carry or borrow from the most significant nibble
of the least significant byte – Aids BCD arithmetic
ZF – Zero Flag
Set by most instructions if the result of the
arithmetic operation is zero
8. Details of the flags
SF – Sign Flag
On signed operands, this tells whether the result is
positive or negative
TF – Trace Flag
On being set it allows single-step through programs.
Executes exactly one instruction and generates an
internal exception 1 (debug fault)
9. Details of the flags
IF – Interrupt Flag
When set, the processor recognizes the external
hardware interrupts on INTR pin. On clearing,
anyway has not effect on NMI (external non
maskable interrupt) pin or internally generated
faults, exceptions, traps etc. This flag can be set and
cleared using the STI and CLI instructions
respectively
DF – Direction Flag
Specifically for string instructions. DF = 1 increments
ESI and EDI, while DF = 0 decrements the same. Set
and cleared by STD and CLD instructions
10. Details of the flags
OF – Overflow Flag
Most arithmetic instructions set this flag to indicate
that the result was at least 1 bit too large to fit in the
destination
IOPL – Input Output Privilege Level flags
For protected mode operations – indicates the
privilege level, 0 to 3, at which your code must be
running in order to execute any I/O-related
instructions
11. Details of the flags
NT – Nested Task Flag
When set, it indicates that one system task has
invoked another through a CALL instruction as
opposed to a JMP. For multitasking this can be
manipulated to our advantage
RF – Resume Flag
It is related to Debug registers DR6 and DR7. By
setting this, you can selectively mask some
exceptions while you are debugging code
12. Details of the flags
VM – Virtual 8086 mode flag
When it is set, the x86 processor is basically converted into a
high-speed 8086 processor.
AC (bit 18) Alignment check flag — Set this flag and
the AM bit in the CR0 register to
enable alignment checking of memory references; clear the AC
flag and/or the
AM bit to disable alignment checking.
VIF (bit 19) Virtual interrupt flag — Virtual image of
the IF flag. Used in conjunction
with the VIP flag. (To use this flag and the VIP flag the virtual
mode extensions
are enabled by setting the VME flag in control register CR4.)
13. Details of the flags
VIP (bit 20) Virtual interrupt pending flag
— Set to indicate that an interrupt is pending;
clear when no interrupt is pending. (Software sets
and clears this flag; the
processor only reads it.) Used in conjunction with
the VIF flag.
ID (bit 21) Identification flag — The ability
of a program to set or clear this flag indicates
support for the CPUID instruction.
17. 1/2002 JNM
General Purpose Registers
AX (Accumulator) – favored by CPU for arithmetic
operations
BX – Base – can hold the address of a procedure or
variable (SI, DI, and BP can also). Can also
perform arithmetic and data movement.
CX – acts as a counter for repeating or looping
instructions.
DX – holds the high 16 bits of the product in
multiply (also handles divide operations)
19. 1/2002 JNM
Index Registers
Contain the offset of data(variables, labels) and
instructions from its base segment.
BP – Base Pointer – contains an assumed offset
from the SS register. Often used by a
subroutine to locate variables that were passed
on the stack by a calling program.
SP – Stack Pointer – Contains the offset of the
top of the stack.
20. 1/2002 JNM
Index Registers
Speed up processing of strings, arrays, and other data
structures containing multiple elements.
SI – Source Index – Used in string movement
instructions. The source string is pointed to by the SI
register.
DI – Destination Index – acts as the destination for
string movement instructions
22. 1/2002 JNM
Flags - Status
Carry (CF) – set when the result of an unsigned
arithmetic operation is too large to fit into the
destination.
Overflow(OF) – set when the result of a signed
arithmetic operation is too wide to fit into the
destination.
Sign(SF) – set when the result of an arithmetic
or logical operation generates a negative result.
Zero(ZF) – set when the result of an arithmetic
or logical operation is zero.
23. 1/2002 JNM
Flags – Status (cont)
Auxiliary Carry(AF) – set when the result of an
operation causes a carry from bit 3 to bit 4.
Parity(PF) – reflects whether the number of 1 bits in
the result of an operation is even or odd. 1 – odd, 0-
even.
24. 1/2002 JNM
Flags - Control
Interrupt(IF) – dictates whether or not system
interrupts can occur. 1 – enabled, 0 – disabled.
Trap(TF) – determines whether or not the CPU is
halted after each instruction. Allows programmers
to do tracing.
Direction(DF) – affects block data transfer
instructions such as MOVS, CMPS. 0 – up, 1 –
down.
26. 1/2002 JNM
Instruction Execution Cycle
Fetch the next operation
Place it in the queue
Update the program counter
Decode the Instruction
Perform address translation
Fetch Operands from memory
Execute the Instruction
Perform the required calculation
Store results in memory or registers
Set status flags attached to the CPU
33. Direct Addressing
• 16-bit Memory Operand Addressing Modes
– 16-bit addressing modes and 32-bit addressing modes
– Physical address = Segment Base: EA(effective address)
• Segment Base Address(SBA) : the starting location of the
segment
• EA : the offset of the operand from the beginning of the
segment of memory
EA = Base + Index + Displacement
Base = BX or BP, Index = SI or DI, displacement = 8-bit
or 16-bit
44. adc Add with carry flag
add Add two numbers
and Bitwise logical AND
call Call procedure or function
cbw Convert byte to word (signed)
cli Clear interrupt flag (disable interrupts)
cwd Convert word to doubleword (signed)
cmp Compare two operands
dec Decrement by 1
div Unsigned divide
idiv Signed divide
imul Signed multiply
in Input (read) from port
inc Increment by 1
int Call to interrupt procedure
Instruction Set
48. iret Interrupt return
j?? Jump if ?? condition met
jmp Unconditional jump
lea Load effective address offset
mov Move data
mul Unsigned multiply
neg Two's complement negate
nop No operation
not One's complement negate
or Bitwise logical OR
out Output (write) to port
pop Pop word from stack
popf Pop flags from stack
push Push word onto stack
Instruction Set (Contd.)
49. pushf Push flags onto stack
ret Return from procedure or function
sal Bitwise arithmetic left shift (same as shl)
sar Bitwise arithmetic right shift (signed)
sbb Subtract with borrow
shl Bitwise left shift (same as sal)
shr Bitwise right shift (unsigned)
sti Set interrupt flag (enable interrupts)
sub Subtract two numbers
test Bitwise logical compare
xor Bitwise logical XOR
Instruction Set (Contd.)
51. 51
Data transfer : Move
MOV Dest, Src
MOV reg, reg reg <- reg
MOV reg, mem reg <- mem
MOV mem, reg mem <- reg
MOV reg, imm reg <- imm
MOV mem, imm mem <- imm
There is no move mem<-mem instruction.
52. 52
Move limitation
Both operand must be in the same size.
There is no instruction to put immediate value
directly to segment register. Have to use
accumulator (AX) to accomplish this.
To put immediate value directly to memory,
we have to specify its size. (Byte/Word PTR)
56. Friday, August 22, 2014 Thorough 8086 56
The EU also contains the Flag Register which is a collection of condition
bits and control bits. The condition bits are set or cleared by the execution
of an instruction. The control bits are set by instructions to control some
operation of the CPU.
Bit 0 - CF Carry Flag - Set by carry out of msb
Bit 2 - PF Parity Flag - Set if result has even parity
Bit 4 - AF Auxiliary Flag - for BCD arithmetic
Bit 6 - ZF Zero Flag - Set if result is zero
Bit 7 - SF Sign Flag = msb of result
Bit 8 - TF Single Step Trap Flag
Bit 9 - IF Interrupt Enable Flag
Bit 10 - DF String Instruction Direction Flag
Bit 11 - OF Overflow Flag
Bits 1, 3, 5, 12-15 are undefined.
63. 63
Sign flag
Sign flag will be set whenever the result is negative
with signed operation.
64. 64
More flag
Auxiliary flag will be set when the result of BCD
operation need to be adjusted.
Direction flag is used to specify direction
(increment/decrement index register) in string
operation.
Trap flag is used to interrupt CPU after each
operation.
Interrupt flag is used to enable/disable hardware
interrupt.
