SlideShare a Scribd company logo
1 of 21
Download to read offline
Records of demonstration experiments




                                       ········
S.No.       Contents       Page No.
               I.      Introduction        1
              II.        Principle         2
              III.      Basic Gates        3
              IV.        OR Gate           4
               V.       AND Gate           5
              VI.       NOT Gate           6
             VII.       NOR Gate           7
             VIII.     NAND Gate           8
              IX.      EX-OR Gate          9
               X      EX-NOR Gate          10
               XI Step-Down Transformer    13
              XII Step-Up Transformer      14
             XIII      Construction        15
             XIV          Theory           16
              XV       Energy Losses       17
             XVI       Bibliography        18


Samyak Sau
A gate is defined as a digital circuit which follows some
logical relationship between the input and output voltages.
It is a digital circuit which either allows a signal to pass
through as stop, it is called a gate.
The logic gates are building blocks at digital
electronics. They are used in digital electronics to change
on voltage level (input voltage) into another (output
voltage) according to some logical statement relating them.
A logic gate may have one or more inputs, but it has only
one output. The relationship between the possible values of
input and output voltage is expressed in the form of a table
called truth table or table of combinations.
Truth table of a Logic Gates is a table that shows all the
input and output possibilities for the logic gate.
George Boole in 1980 invented a different kind of algebra
based on binary nature at the logic, this algebra of logic
called BOOLEAN ALGEBRA. A logical statement can have
only two values, such as HIGH/LOW, ON/OFF,
CLOSED/OPEN, YES/NO, RIGHT/WRONG, TRUE/FALSE,
CONDUCTING/NON-CONDUCTING etc. The two values of
logic statements one denoted by the binary number 1 and 0.
The binary number 1 is used to denote the high value. The
logical statements that logic gates follow are called Boolean
expressions.
                                                          ········
Any Boolean algebra operation can be associated
with inputs and outputs represent the statements of
Boolean algebra. Although these circuits may be
complex, they may all be constructed from three basic
devices. We have three different types of logic gates
.These are the AND gate, the OR gate and the NOT
gate.
                             LOGIC STATES
                               1       0
                            HIGH     LOW
                              +v      Ov
                              ON     OFF
                            CLOSE OPEN
                            RIGHT WRONG
                            TRUE FALSE
                              YES     NO




Samyak Sau
(a)   THE OR GATE is a device that combines A with B to give Y as the
      result.
      The OR gate has two or more inputs and one output. The logic gate of
      OR gate with A and B input and Y output is shown below:




      In Boolean algebra, addition symbol (+) is referred as the OR. The
      Boolean expression:
                       A+B=Y, indicates Y equals A OR B.

(b)   THE AND GATE is a device that combines A with B to give Y as the
      result.
      The AND gate has two or more inputs and one output. The logic gate
      of AND gate with A and B input and Y output is shown below:




      In Boolean algebra, multiplication sign (either x or.) is referred as the
      AND. The Boolean expression:
                       A.B=Y, indicates Y equals A AND B.

(c)   THE NOT GATE is a device that inverts the inputs. The NOT is a one
      input and one output. The logic gate of NOT gate with A and Y
      output is shown below:




                                      _
      In Boolean algebra, bar symbol ( ) is referred as the NOT. The Boolean
      expression:
                         Ã =Y, indicates Y equals NOT A.
                                                                             ········
Aim:
             TO DESIGN AND SIMULATE THE OR GATE CIRCUIT.

Components:
             Two ideal p-n junction diode (D1 and D2).


Theory and Construction:
       An OR gate can be realize by the electronic circuit, making use of two diodes D1 and
D2 as shown in the figure.
Here the negative terminal of the battery is grounded and corresponds to the 0 level, and
the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to
level 1. The output Y is voltage at C w.r.t. earth.




The following interference can be easily drawn from the working of electrical circuit is:
a)     If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0.
b)     If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
c)     If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
d)     If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1.

Truth Table:
                                         Input A Input B Output Y
                                            0       0       0
                                            1       0        1
                                            0       1        1
                                            1       1        1

Samyak Sau
Aim:
     TO DESIGN AND SIMULATE THE AND GATE CIRCUIT.

Components:
     Two ideal p-n junction diode (D1 and D2), a resistance R.


Theory and Construction:
       An AND gate can be realize by the electronic circuit, making use of two diodes D1
and D2 as shown in the figure. The resistance R is connected to the positive terminal of a
5V battery permanently.
Here the negative terminal of the battery is grounded and corresponds to the 0 level, and
the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to
level 1. The output Y is voltage at C w.r.t. earth.




The following conclusions can be easily drawn from the working of electrical circuit:
a)     If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0.
b)     If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.
c)     If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence Y=0.
d)     If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.

Truth Table:
                                     Input A Input B Output Y
                                        0       0       0
                                        1       0       0
                                        0       1       0
                                        1       1        1
                                                                                        ········
Aim:
             TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT.

Components:
             An ideal n-p-n transistor.


Theory and Construction:
       A NOT gate cannot be realized by using diodes. However an electronic circuit of NOT
gate can be realized by making use of a n-p-n transistor as shown in the figure.
The base B of the transistor is connected to the input A through a resistance R b and the
emitter E is earthed. The collector is connected to 5V battery. The output Y is voltage at C
w.r.t. earth.




The following conclusion can be easily drawn from the working of the electrical circuit:

a)            If switch A is open (i.e. A=0), the lump will glow, hence Y=1.
b)            If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0.


Truth Table:
                                                   Input A Output Y
                                                      0        1
                                                      1       0


Samyak Sau
Aim:
     TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT.

Components:
     Two ideal p-n junction diode (D1 and D2), an ideal n-p-n transistor.


Theory and Construction:
       If we connect the output Y’ of OR gate to the input of a NOT gate the gate obtained
is called NOR.
The output Y is voltage at C w.r.t. earth.




In Boolean expression, the NOR gate is expressed as Y=A+B, and is being read as ‘A OR B
negated’. The following interference can be easily drawn from the working of electrical
circuit is:
a)      If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
b)      If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.
c)      If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0.
d)      If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.


Truth Table:
                                  Input A Input B Output Y
                                     0       0        1
                                     1       0       0
                                     0       1       0
                                     1       1       0

                                                                                      ········
Aim:
             TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT.

Components:
             Two ideal p-n junction diode (D1 and D2), a resistance R, an ideal n-p-n transistor.


Theory and Construction:
       If we connect the output Y’ of AND gate to the input of a NOT gate the gate obtained
is called NAND.
The output Y is voltage at C w.r.t. earth.




In Boolean expression, the NAND gate is expressed as Y=A.B, and is being read as ‘A AND B
negated’. The following interference can be easily drawn from the working of electrical
circuit:
a)       If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
b)       If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
c)      If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
d)       If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.


Truth Table:
                                           Input A Input B Output Y
                                              0       0        1
                                              1       0        1
                                              0       1        1
                                              1       1       0


Samyak Sau
Aim:
      TO DESIGN AND SIMULATE THE EX OR GATE CIRCUIT.

Components:
      Two AND gate, an OR gate, two NOT gate.


Theory and Construction:
       The operation EXOR checks for the exclusivity in the value of the two signals A and
B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=1,
and if both are identical, then the output Y=0. This operation is also called exclusive OR
gate, designated EXOR.




In Boolean expression, the EX OR gate is expressed as
                                     Y=A.B + A.B =
The following interference can be easily drawn from the working of electrical circuit:
a)     If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0.
b)     If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
c)     If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
d)     If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.


Truth Table:
                                   Input A Input B Output Y
                                      0       0       0
                                      1       0        1
                                      0       1        1
                                      1       1       0


                                                                                         ········
Aim:
             TO DESIGN AND SIMULATE THE EX NOR GATE CIRCUIT.

Components:
             Two AND gate, an OR gate, three NOT gate.


Theory and Construction:
       The operation EXNOR checks for the exclusivity in the value of the two signals A and
B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=0,
and if both are identical, then the output Y=1. This operation is also called exclusive NOR
gate, designated EXNOR.




In Boolean expression, the EX NOR gate is expressed as
                                     Y=A.B + A.B =
The following interference can be easily drawn from the working of electrical circuit:
a)     If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
b)     If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0.
c)     If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0.
d)     If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.


Truth Table:
                                        Input A Input B Output Y
                                           0       0        1
                                           1       0       0
                                           0       1       0
                                           1       1        1

Samyak Sau
The transformer is a device used for converting

a low alternating voltage to a high alternating

voltage or a high alternating voltage into a low

alternating voltage.




                                                  ········
It is based on the principle of mutual induction that

is if a varying current is set-up in a circuit induced

e.m.f. is produced in the neighbouring circuit. The

varying current in a circuit produce varying

magnetic     flux   which   induces   e.m.f.   in   the

neighbouring circuit.




Samyak Sau
In this step-down transformer is used:
This transformer converts high voltage at alternating current into low
voltage alternating current. In step-down transformer the number of
turns in primary coil remains large as compare to secondary coil.




                                                                    ········
In this step-up transformer is used:
This transformer converts low voltage at alternating current into high
voltage alternating current. In step-up transformer the number of
turns in secondary coil remains large as compare to primary coil.




Samyak Sau
The transformer consists of two coils. They are insulated

with each other by insulated material and wound on a

common core. For operation at low frequency, we may have

a soft iron. The soft iron core is insulating by joining thin

iron strips coated with varnish to insulate them to reduce

energy losses by eddy currents.

The input circuit is called primary. And the output circuit is

called secondary.




                                                           ········
Suppose, the number of turns in the primary coil is NP and
that in the secondary coil is NS. The resistance of the coil is
assumed to be zero. Let dq /dt be the rate of change of flux
in each turn of the primary coil. If Ep be the e.m.f. in the
primary circuit then.
                   EP = –NP                  (1)
We suppose that there is no loss of flux between the
primary and secondary coils. Then, the induced e.m.f. in the
secondary coil will be:
                   ES = –NS                 (2)
 From equations (i) and (ii), we find:
                          Ns/Np = K
 is called transformer ratio or turn ratio.
For step up transformer K > 1
For step down transformer K < 1
That is for step-up transformer NS > NP, therefore ES>EP.
For the step down transformer NS < NP therefore ES < EP.

Efficiency: The efficiency of the transformer is given by:
If Ip and Is be the currents in the primary and secondary
circuits. For ideal transformer = 1 = 100%. Therefore
                         ES|IS = EP|IP
Therefore, for step up, transformer current in the
secondary is less than in the primary (IS < IP). And in a step
down transformer we have IS > IP.

Samyak Sau
In practice, the output energy of a transformer is always less
than the input energy, because energy losses occur due to a
number of reasons as explained below.

  1. Loss of Magnetic Flux: The coupling between the
      coils is seldom perfect. So, whole of the magnetic flux
      produced by the primary coil is not linked up with the
      secondary coil.
  2.
  3. Iron Loss: In actual iron cores in spite of lamination,
      Eddy currents are produced. The magnitude of eddy
      current may, however be small. And a part of energy is
      lost as the heat produced in the iron core.
  4.
3. Copper Loss: In practice, the coils of the transformer
possess resistance. So a part of the energy is lost due to the
heat produced in the resistance of the coil.

  5. Hysteresis Loss: The alternating current in the coil
     tapes the iron core through complete cycle of
     magnetization. So Energy is lost due to hysteresis.
  6.
5. Magneto restriction: The alternating current in the
Transformer may be set its parts in to vibrations and sound
may be produced. It is called humming. Thus, a part of
energy may be lost due to humming.


                                                           ········
Encarta Encyclopaedia.

             Britannica Encyclopaedia.

             www.wikipedia.com.

             www.answers.com.

             www.google.co.in.


Samyak Sau
········

More Related Content

What's hot

Latches and flip flop
Latches and flip flopLatches and flip flop
Latches and flip flopShuaib Hotak
 
SHIFT REGISTERS
SHIFT REGISTERSSHIFT REGISTERS
SHIFT REGISTERSkumari36
 
boolean algrebra and logic gates in short
boolean algrebra and logic gates in shortboolean algrebra and logic gates in short
boolean algrebra and logic gates in shortRojin Khadka
 
Nand and nor as a universal gates
Nand and nor as a universal gatesNand and nor as a universal gates
Nand and nor as a universal gatesKaushal Shah
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.Satya P. Joshi
 
Decoders-Digital Electronics
Decoders-Digital ElectronicsDecoders-Digital Electronics
Decoders-Digital ElectronicsPaurav Shah
 
Digital logic gate and its application
Digital logic gate and its applicationDigital logic gate and its application
Digital logic gate and its applicationAbdullah Al Masud
 
Presentation On Logic Gate
Presentation On Logic Gate Presentation On Logic Gate
Presentation On Logic Gate Nazrul Islam
 
Combinational circuits
Combinational circuitsCombinational circuits
Combinational circuitsSARITHA REDDY
 

What's hot (20)

Code conversion
Code conversionCode conversion
Code conversion
 
Chapter 6 register
Chapter 6 registerChapter 6 register
Chapter 6 register
 
Latches and flip flop
Latches and flip flopLatches and flip flop
Latches and flip flop
 
Verilog lab manual (ECAD and VLSI Lab)
Verilog lab manual (ECAD and VLSI Lab)Verilog lab manual (ECAD and VLSI Lab)
Verilog lab manual (ECAD and VLSI Lab)
 
Latches and flip flops
Latches and flip flopsLatches and flip flops
Latches and flip flops
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Logic Gates
Logic GatesLogic Gates
Logic Gates
 
logic gates
logic gateslogic gates
logic gates
 
SHIFT REGISTERS
SHIFT REGISTERSSHIFT REGISTERS
SHIFT REGISTERS
 
boolean algrebra and logic gates in short
boolean algrebra and logic gates in shortboolean algrebra and logic gates in short
boolean algrebra and logic gates in short
 
Multiplexers
MultiplexersMultiplexers
Multiplexers
 
Basic Logic gates
Basic Logic gatesBasic Logic gates
Basic Logic gates
 
Nand and nor as a universal gates
Nand and nor as a universal gatesNand and nor as a universal gates
Nand and nor as a universal gates
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
 
Two port network
Two port networkTwo port network
Two port network
 
Decoders-Digital Electronics
Decoders-Digital ElectronicsDecoders-Digital Electronics
Decoders-Digital Electronics
 
Digital logic gate and its application
Digital logic gate and its applicationDigital logic gate and its application
Digital logic gate and its application
 
Presentation On Logic Gate
Presentation On Logic Gate Presentation On Logic Gate
Presentation On Logic Gate
 
CMOS Logic Circuits
CMOS Logic CircuitsCMOS Logic Circuits
CMOS Logic Circuits
 
Combinational circuits
Combinational circuitsCombinational circuits
Combinational circuits
 

Viewers also liked

Logic gate class 12
Logic gate class 12Logic gate class 12
Logic gate class 12Nipun Shah
 
physics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebraphysics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebrasukhtej
 
12th CBSE Physics Project AC Generator
12th CBSE Physics Project AC Generator12th CBSE Physics Project AC Generator
12th CBSE Physics Project AC GeneratorAshwin Francis
 
Transformers Project report
Transformers Project reportTransformers Project report
Transformers Project reportTanuj Gupta
 
A. c. generator by sujay class 12th
A. c. generator by sujay class 12thA. c. generator by sujay class 12th
A. c. generator by sujay class 12thSujay Lal
 
Physics investigatory project on RECTIFIER
Physics investigatory project on RECTIFIERPhysics investigatory project on RECTIFIER
Physics investigatory project on RECTIFIERNaveen R
 
Physics Investigatory Project Class 12
Physics Investigatory Project Class 12Physics Investigatory Project Class 12
Physics Investigatory Project Class 12Self-employed
 

Viewers also liked (8)

Logic gate class 12
Logic gate class 12Logic gate class 12
Logic gate class 12
 
physics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebraphysics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebra
 
12th CBSE Physics Project AC Generator
12th CBSE Physics Project AC Generator12th CBSE Physics Project AC Generator
12th CBSE Physics Project AC Generator
 
Transformers Project report
Transformers Project reportTransformers Project report
Transformers Project report
 
A. c. generator by sujay class 12th
A. c. generator by sujay class 12thA. c. generator by sujay class 12th
A. c. generator by sujay class 12th
 
Physics investigatory project on RECTIFIER
Physics investigatory project on RECTIFIERPhysics investigatory project on RECTIFIER
Physics investigatory project on RECTIFIER
 
Transformer(Class 12 Investigatory Project)
Transformer(Class 12 Investigatory Project)Transformer(Class 12 Investigatory Project)
Transformer(Class 12 Investigatory Project)
 
Physics Investigatory Project Class 12
Physics Investigatory Project Class 12Physics Investigatory Project Class 12
Physics Investigatory Project Class 12
 

Similar to Report on-the-logic-gates

Physics investigatgory project on logic gates class 12
Physics  investigatgory project on logic gates class 12Physics  investigatgory project on logic gates class 12
Physics investigatgory project on logic gates class 12appietech
 
physics investigatory on logic gates
physics investigatory on logic gatesphysics investigatory on logic gates
physics investigatory on logic gatesMoviesBuzz1
 
verification of logic gates cbse class 12
verification of logic gates cbse class 12verification of logic gates cbse class 12
verification of logic gates cbse class 12Kirthi Kirthu
 
Physics logic gates1
Physics logic gates1Physics logic gates1
Physics logic gates1Kirthi Kirthu
 
Physics investigatory project
Physics investigatory projectPhysics investigatory project
Physics investigatory projectAbhinav Kumar
 
Physics Investigatory project Class 12 Logic Gates
Physics Investigatory project Class 12 Logic GatesPhysics Investigatory project Class 12 Logic Gates
Physics Investigatory project Class 12 Logic GatesRaghav Rathi
 
296779866 c-b-s-e-class-12-physics-project-on-logic-gates
296779866 c-b-s-e-class-12-physics-project-on-logic-gates296779866 c-b-s-e-class-12-physics-project-on-logic-gates
296779866 c-b-s-e-class-12-physics-project-on-logic-gatesAnuragSharma530
 
Solids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.pptSolids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.pptJosephMuez2
 
solids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.pptsolids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.pptUmeshPatil149
 
Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4Self-employed
 
logic gates using IC cbse class 12
logic gates using IC cbse class 12logic gates using IC cbse class 12
logic gates using IC cbse class 12Kirthi Kirthu
 
Physics logic gates 2
Physics logic gates 2Physics logic gates 2
Physics logic gates 2Kirthi Kirthu
 
Physics_Investigatory_Project_on_Logic_G.pptx
Physics_Investigatory_Project_on_Logic_G.pptxPhysics_Investigatory_Project_on_Logic_G.pptx
Physics_Investigatory_Project_on_Logic_G.pptxNitinMaurya62
 
Digital logic gates and Boolean algebra
Digital logic gates and Boolean algebraDigital logic gates and Boolean algebra
Digital logic gates and Boolean algebraSARITHA REDDY
 
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed KhanDigital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed KhanYasir Khan
 
LOGIC GATE ||CLASS 12 PHYSICS I
LOGIC GATE ||CLASS 12 PHYSICS ILOGIC GATE ||CLASS 12 PHYSICS I
LOGIC GATE ||CLASS 12 PHYSICS IAryan137
 

Similar to Report on-the-logic-gates (20)

Physic investigatory
Physic investigatoryPhysic investigatory
Physic investigatory
 
Physics investigatgory project on logic gates class 12
Physics  investigatgory project on logic gates class 12Physics  investigatgory project on logic gates class 12
Physics investigatgory project on logic gates class 12
 
physics investigatory on logic gates
physics investigatory on logic gatesphysics investigatory on logic gates
physics investigatory on logic gates
 
verification of logic gates cbse class 12
verification of logic gates cbse class 12verification of logic gates cbse class 12
verification of logic gates cbse class 12
 
Physics logic gates1
Physics logic gates1Physics logic gates1
Physics logic gates1
 
Physics investigatory project
Physics investigatory projectPhysics investigatory project
Physics investigatory project
 
Physics Investigatory project Class 12 Logic Gates
Physics Investigatory project Class 12 Logic GatesPhysics Investigatory project Class 12 Logic Gates
Physics Investigatory project Class 12 Logic Gates
 
296779866 c-b-s-e-class-12-physics-project-on-logic-gates
296779866 c-b-s-e-class-12-physics-project-on-logic-gates296779866 c-b-s-e-class-12-physics-project-on-logic-gates
296779866 c-b-s-e-class-12-physics-project-on-logic-gates
 
Solids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.pptSolids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.ppt
 
solids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.pptsolids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.ppt
 
Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4
 
logic gates using IC cbse class 12
logic gates using IC cbse class 12logic gates using IC cbse class 12
logic gates using IC cbse class 12
 
Physics logic gates 2
Physics logic gates 2Physics logic gates 2
Physics logic gates 2
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Physics_Investigatory_Project_on_Logic_G.pptx
Physics_Investigatory_Project_on_Logic_G.pptxPhysics_Investigatory_Project_on_Logic_G.pptx
Physics_Investigatory_Project_on_Logic_G.pptx
 
Digital logic
Digital logicDigital logic
Digital logic
 
Digital logic gates and Boolean algebra
Digital logic gates and Boolean algebraDigital logic gates and Boolean algebra
Digital logic gates and Boolean algebra
 
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed KhanDigital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
 
Bca i sem de lab
Bca i sem  de labBca i sem  de lab
Bca i sem de lab
 
LOGIC GATE ||CLASS 12 PHYSICS I
LOGIC GATE ||CLASS 12 PHYSICS ILOGIC GATE ||CLASS 12 PHYSICS I
LOGIC GATE ||CLASS 12 PHYSICS I
 

Recently uploaded

The basics of sentences session 8pptx.pptx
The basics of sentences session 8pptx.pptxThe basics of sentences session 8pptx.pptx
The basics of sentences session 8pptx.pptxheathfieldcps1
 
POST ENCEPHALITIS case study Jitendra bhargav
POST ENCEPHALITIS case study  Jitendra bhargavPOST ENCEPHALITIS case study  Jitendra bhargav
POST ENCEPHALITIS case study Jitendra bhargavJitendra Bhargav
 
3.14.24 The Selma March and the Voting Rights Act.pptx
3.14.24 The Selma March and the Voting Rights Act.pptx3.14.24 The Selma March and the Voting Rights Act.pptx
3.14.24 The Selma March and the Voting Rights Act.pptxmary850239
 
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...Marlene Maheu
 
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...AKSHAYMAGAR17
 
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYS
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYSDLL Catch Up Friday March 22.docx CATCH UP FRIDAYS
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYSTeacherNicaPrintable
 
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...Nguyen Thanh Tu Collection
 
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...Subham Panja
 
Awards Presentation 2024 - March 12 2024
Awards Presentation 2024 - March 12 2024Awards Presentation 2024 - March 12 2024
Awards Presentation 2024 - March 12 2024bsellato
 
Pharmacology chapter No 7 full notes.pdf
Pharmacology chapter No 7 full notes.pdfPharmacology chapter No 7 full notes.pdf
Pharmacology chapter No 7 full notes.pdfSumit Tiwari
 
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...Nguyen Thanh Tu Collection
 
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdf
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdfPHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdf
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdfSumit Tiwari
 
Plant Tissue culture., Plasticity, Totipotency, pptx
Plant Tissue culture., Plasticity, Totipotency, pptxPlant Tissue culture., Plasticity, Totipotency, pptx
Plant Tissue culture., Plasticity, Totipotency, pptxHimansu10
 
LEAD5623 The Economics of Community Coll
LEAD5623 The Economics of Community CollLEAD5623 The Economics of Community Coll
LEAD5623 The Economics of Community CollDr. Bruce A. Johnson
 
Metabolism of lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptx
Metabolism of  lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptxMetabolism of  lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptx
Metabolism of lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptxDr. Santhosh Kumar. N
 
3.12.24 The Social Construction of Gender.pptx
3.12.24 The Social Construction of Gender.pptx3.12.24 The Social Construction of Gender.pptx
3.12.24 The Social Construction of Gender.pptxmary850239
 
Dhavni Theory by Anandvardhana Indian Poetics
Dhavni Theory by Anandvardhana Indian PoeticsDhavni Theory by Anandvardhana Indian Poetics
Dhavni Theory by Anandvardhana Indian PoeticsDhatriParmar
 

Recently uploaded (20)

The basics of sentences session 8pptx.pptx
The basics of sentences session 8pptx.pptxThe basics of sentences session 8pptx.pptx
The basics of sentences session 8pptx.pptx
 
ANOVA Parametric test: Biostatics and Research Methodology
ANOVA Parametric test: Biostatics and Research MethodologyANOVA Parametric test: Biostatics and Research Methodology
ANOVA Parametric test: Biostatics and Research Methodology
 
POST ENCEPHALITIS case study Jitendra bhargav
POST ENCEPHALITIS case study  Jitendra bhargavPOST ENCEPHALITIS case study  Jitendra bhargav
POST ENCEPHALITIS case study Jitendra bhargav
 
3.14.24 The Selma March and the Voting Rights Act.pptx
3.14.24 The Selma March and the Voting Rights Act.pptx3.14.24 The Selma March and the Voting Rights Act.pptx
3.14.24 The Selma March and the Voting Rights Act.pptx
 
t-test Parametric test Biostatics and Research Methodology
t-test Parametric test Biostatics and Research Methodologyt-test Parametric test Biostatics and Research Methodology
t-test Parametric test Biostatics and Research Methodology
 
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...
2024 March 11, Telehealth Billing- Current Telehealth CPT Codes & Telehealth ...
 
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...
DNA and RNA , Structure, Functions, Types, difference, Similarities, Protein ...
 
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYS
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYSDLL Catch Up Friday March 22.docx CATCH UP FRIDAYS
DLL Catch Up Friday March 22.docx CATCH UP FRIDAYS
 
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (GLOB...
 
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...
THYROID HORMONE.pptx by Subham Panja,Asst. Professor, Department of B.Sc MLT,...
 
Awards Presentation 2024 - March 12 2024
Awards Presentation 2024 - March 12 2024Awards Presentation 2024 - March 12 2024
Awards Presentation 2024 - March 12 2024
 
Problems on Mean,Mode,Median Standard Deviation
Problems on Mean,Mode,Median Standard DeviationProblems on Mean,Mode,Median Standard Deviation
Problems on Mean,Mode,Median Standard Deviation
 
Pharmacology chapter No 7 full notes.pdf
Pharmacology chapter No 7 full notes.pdfPharmacology chapter No 7 full notes.pdf
Pharmacology chapter No 7 full notes.pdf
 
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...
BÀI TẬP BỔ TRỢ TIẾNG ANH 11 THEO ĐƠN VỊ BÀI HỌC - CẢ NĂM - CÓ FILE NGHE (FRIE...
 
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdf
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdfPHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdf
PHARMACOGNOSY CHAPTER NO 5 CARMINATIVES AND G.pdf
 
Plant Tissue culture., Plasticity, Totipotency, pptx
Plant Tissue culture., Plasticity, Totipotency, pptxPlant Tissue culture., Plasticity, Totipotency, pptx
Plant Tissue culture., Plasticity, Totipotency, pptx
 
LEAD5623 The Economics of Community Coll
LEAD5623 The Economics of Community CollLEAD5623 The Economics of Community Coll
LEAD5623 The Economics of Community Coll
 
Metabolism of lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptx
Metabolism of  lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptxMetabolism of  lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptx
Metabolism of lipoproteins & its disorders(Chylomicron & VLDL & LDL).pptx
 
3.12.24 The Social Construction of Gender.pptx
3.12.24 The Social Construction of Gender.pptx3.12.24 The Social Construction of Gender.pptx
3.12.24 The Social Construction of Gender.pptx
 
Dhavni Theory by Anandvardhana Indian Poetics
Dhavni Theory by Anandvardhana Indian PoeticsDhavni Theory by Anandvardhana Indian Poetics
Dhavni Theory by Anandvardhana Indian Poetics
 

Report on-the-logic-gates

  • 1. Records of demonstration experiments ········
  • 2. S.No. Contents Page No. I. Introduction 1 II. Principle 2 III. Basic Gates 3 IV. OR Gate 4 V. AND Gate 5 VI. NOT Gate 6 VII. NOR Gate 7 VIII. NAND Gate 8 IX. EX-OR Gate 9 X EX-NOR Gate 10 XI Step-Down Transformer 13 XII Step-Up Transformer 14 XIII Construction 15 XIV Theory 16 XV Energy Losses 17 XVI Bibliography 18 Samyak Sau
  • 3. A gate is defined as a digital circuit which follows some logical relationship between the input and output voltages. It is a digital circuit which either allows a signal to pass through as stop, it is called a gate. The logic gates are building blocks at digital electronics. They are used in digital electronics to change on voltage level (input voltage) into another (output voltage) according to some logical statement relating them. A logic gate may have one or more inputs, but it has only one output. The relationship between the possible values of input and output voltage is expressed in the form of a table called truth table or table of combinations. Truth table of a Logic Gates is a table that shows all the input and output possibilities for the logic gate. George Boole in 1980 invented a different kind of algebra based on binary nature at the logic, this algebra of logic called BOOLEAN ALGEBRA. A logical statement can have only two values, such as HIGH/LOW, ON/OFF, CLOSED/OPEN, YES/NO, RIGHT/WRONG, TRUE/FALSE, CONDUCTING/NON-CONDUCTING etc. The two values of logic statements one denoted by the binary number 1 and 0. The binary number 1 is used to denote the high value. The logical statements that logic gates follow are called Boolean expressions. ········
  • 4. Any Boolean algebra operation can be associated with inputs and outputs represent the statements of Boolean algebra. Although these circuits may be complex, they may all be constructed from three basic devices. We have three different types of logic gates .These are the AND gate, the OR gate and the NOT gate. LOGIC STATES 1 0 HIGH LOW +v Ov ON OFF CLOSE OPEN RIGHT WRONG TRUE FALSE YES NO Samyak Sau
  • 5. (a) THE OR GATE is a device that combines A with B to give Y as the result. The OR gate has two or more inputs and one output. The logic gate of OR gate with A and B input and Y output is shown below: In Boolean algebra, addition symbol (+) is referred as the OR. The Boolean expression: A+B=Y, indicates Y equals A OR B. (b) THE AND GATE is a device that combines A with B to give Y as the result. The AND gate has two or more inputs and one output. The logic gate of AND gate with A and B input and Y output is shown below: In Boolean algebra, multiplication sign (either x or.) is referred as the AND. The Boolean expression: A.B=Y, indicates Y equals A AND B. (c) THE NOT GATE is a device that inverts the inputs. The NOT is a one input and one output. The logic gate of NOT gate with A and Y output is shown below: _ In Boolean algebra, bar symbol ( ) is referred as the NOT. The Boolean expression: Ã =Y, indicates Y equals NOT A. ········
  • 6. Aim: TO DESIGN AND SIMULATE THE OR GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2). Theory and Construction: An OR gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure. Here the negative terminal of the battery is grounded and corresponds to the 0 level, and the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth. The following interference can be easily drawn from the working of electrical circuit is: a) If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0. b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1. c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1. d) If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1. Truth Table: Input A Input B Output Y 0 0 0 1 0 1 0 1 1 1 1 1 Samyak Sau
  • 7. Aim: TO DESIGN AND SIMULATE THE AND GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), a resistance R. Theory and Construction: An AND gate can be realize by the electronic circuit, making use of two diodes D1 and D2 as shown in the figure. The resistance R is connected to the positive terminal of a 5V battery permanently. Here the negative terminal of the battery is grounded and corresponds to the 0 level, and the positive terminal of the battery (i.e. voltage 5V in the present case) corresponds to level 1. The output Y is voltage at C w.r.t. earth. The following conclusions can be easily drawn from the working of electrical circuit: a) If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0. b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0. c) If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence Y=0. d) If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1. Truth Table: Input A Input B Output Y 0 0 0 1 0 0 0 1 0 1 1 1 ········
  • 8. Aim: TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT. Components: An ideal n-p-n transistor. Theory and Construction: A NOT gate cannot be realized by using diodes. However an electronic circuit of NOT gate can be realized by making use of a n-p-n transistor as shown in the figure. The base B of the transistor is connected to the input A through a resistance R b and the emitter E is earthed. The collector is connected to 5V battery. The output Y is voltage at C w.r.t. earth. The following conclusion can be easily drawn from the working of the electrical circuit: a) If switch A is open (i.e. A=0), the lump will glow, hence Y=1. b) If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0. Truth Table: Input A Output Y 0 1 1 0 Samyak Sau
  • 9. Aim: TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), an ideal n-p-n transistor. Theory and Construction: If we connect the output Y’ of OR gate to the input of a NOT gate the gate obtained is called NOR. The output Y is voltage at C w.r.t. earth. In Boolean expression, the NOR gate is expressed as Y=A+B, and is being read as ‘A OR B negated’. The following interference can be easily drawn from the working of electrical circuit is: a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0. c) If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0. d) If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0. Truth Table: Input A Input B Output Y 0 0 1 1 0 0 0 1 0 1 1 0 ········
  • 10. Aim: TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT. Components: Two ideal p-n junction diode (D1 and D2), a resistance R, an ideal n-p-n transistor. Theory and Construction: If we connect the output Y’ of AND gate to the input of a NOT gate the gate obtained is called NAND. The output Y is voltage at C w.r.t. earth. In Boolean expression, the NAND gate is expressed as Y=A.B, and is being read as ‘A AND B negated’. The following interference can be easily drawn from the working of electrical circuit: a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1. c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1. d) If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0. Truth Table: Input A Input B Output Y 0 0 1 1 0 1 0 1 1 1 1 0 Samyak Sau
  • 11. Aim: TO DESIGN AND SIMULATE THE EX OR GATE CIRCUIT. Components: Two AND gate, an OR gate, two NOT gate. Theory and Construction: The operation EXOR checks for the exclusivity in the value of the two signals A and B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=1, and if both are identical, then the output Y=0. This operation is also called exclusive OR gate, designated EXOR. In Boolean expression, the EX OR gate is expressed as Y=A.B + A.B = The following interference can be easily drawn from the working of electrical circuit: a) If both switches A&B are open (A=0, B=0) then lamp will not glow, hence Y=0. b) If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1. c) If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1. d) If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0. Truth Table: Input A Input B Output Y 0 0 0 1 0 1 0 1 1 1 1 0 ········
  • 12. Aim: TO DESIGN AND SIMULATE THE EX NOR GATE CIRCUIT. Components: Two AND gate, an OR gate, three NOT gate. Theory and Construction: The operation EXNOR checks for the exclusivity in the value of the two signals A and B. It means if A and B are not identical (i.e. if A=0 and B=1 or vice versa), the output Y=0, and if both are identical, then the output Y=1. This operation is also called exclusive NOR gate, designated EXNOR. In Boolean expression, the EX NOR gate is expressed as Y=A.B + A.B = The following interference can be easily drawn from the working of electrical circuit: a) If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1. b) If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence Y=0. c) If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence Y=0. d) If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1. Truth Table: Input A Input B Output Y 0 0 1 1 0 0 0 1 0 1 1 1 Samyak Sau
  • 13. The transformer is a device used for converting a low alternating voltage to a high alternating voltage or a high alternating voltage into a low alternating voltage. ········
  • 14. It is based on the principle of mutual induction that is if a varying current is set-up in a circuit induced e.m.f. is produced in the neighbouring circuit. The varying current in a circuit produce varying magnetic flux which induces e.m.f. in the neighbouring circuit. Samyak Sau
  • 15. In this step-down transformer is used: This transformer converts high voltage at alternating current into low voltage alternating current. In step-down transformer the number of turns in primary coil remains large as compare to secondary coil. ········
  • 16. In this step-up transformer is used: This transformer converts low voltage at alternating current into high voltage alternating current. In step-up transformer the number of turns in secondary coil remains large as compare to primary coil. Samyak Sau
  • 17. The transformer consists of two coils. They are insulated with each other by insulated material and wound on a common core. For operation at low frequency, we may have a soft iron. The soft iron core is insulating by joining thin iron strips coated with varnish to insulate them to reduce energy losses by eddy currents. The input circuit is called primary. And the output circuit is called secondary. ········
  • 18. Suppose, the number of turns in the primary coil is NP and that in the secondary coil is NS. The resistance of the coil is assumed to be zero. Let dq /dt be the rate of change of flux in each turn of the primary coil. If Ep be the e.m.f. in the primary circuit then. EP = –NP (1) We suppose that there is no loss of flux between the primary and secondary coils. Then, the induced e.m.f. in the secondary coil will be: ES = –NS (2) From equations (i) and (ii), we find: Ns/Np = K is called transformer ratio or turn ratio. For step up transformer K > 1 For step down transformer K < 1 That is for step-up transformer NS > NP, therefore ES>EP. For the step down transformer NS < NP therefore ES < EP. Efficiency: The efficiency of the transformer is given by: If Ip and Is be the currents in the primary and secondary circuits. For ideal transformer = 1 = 100%. Therefore ES|IS = EP|IP Therefore, for step up, transformer current in the secondary is less than in the primary (IS < IP). And in a step down transformer we have IS > IP. Samyak Sau
  • 19. In practice, the output energy of a transformer is always less than the input energy, because energy losses occur due to a number of reasons as explained below. 1. Loss of Magnetic Flux: The coupling between the coils is seldom perfect. So, whole of the magnetic flux produced by the primary coil is not linked up with the secondary coil. 2. 3. Iron Loss: In actual iron cores in spite of lamination, Eddy currents are produced. The magnitude of eddy current may, however be small. And a part of energy is lost as the heat produced in the iron core. 4. 3. Copper Loss: In practice, the coils of the transformer possess resistance. So a part of the energy is lost due to the heat produced in the resistance of the coil. 5. Hysteresis Loss: The alternating current in the coil tapes the iron core through complete cycle of magnetization. So Energy is lost due to hysteresis. 6. 5. Magneto restriction: The alternating current in the Transformer may be set its parts in to vibrations and sound may be produced. It is called humming. Thus, a part of energy may be lost due to humming. ········
  • 20. Encarta Encyclopaedia. Britannica Encyclopaedia. www.wikipedia.com. www.answers.com. www.google.co.in. Samyak Sau