Understanding SWIFT Step Down DC/DC Converters
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To introduce the SWIFT DC/DC Converters with integrated FETs
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Understanding SWIFT Step Down DC/DC Converters
- 6. Synchronous Buck - Charging VIN PHASE PGND VOUT LOAD VIN VOUT PHASE - Volts VOUT - Volts Q1 Q2
- 7. Synchronous Buck - Discharging VIN PHASE PGND VOUT LOAD VIN VOUT PHASE - Volts VOUT - Volts Q1 Q2
- 9. Key SWIFT ™ Converters Product Portfolio 1: Light Load efficiency and low quiescent current
- 10. Synchronized Switching Great for RF or data acquisition applications like Medical Imaging Synchronize together or from a master clock Synchronizing the switching frequencies can help reduce noise TPS54040 TPS54160 TPS54317 TPS54060 TPS54350 TPS54617 TPS54140 TPS54550 TPS54917 Related Devices
- 12. Eco-Mode TM Efficiency 10Vin @ 3.3Vout 3.3Vout Eco-Mode PWM 10Vin @ 3.3Vout Design using TPS54331 Design using TPS5430 TPS54040 TPS54160 TPS54060 TPS5423x TPS54140 TPS5433x Related Devices
- 14. 180 ° Out of Phase Synchronization Power stage 1 Power stage 1+2 Power stage 2 Power stage 1+2: phase shifted 180 ° I input t The input capacitance is reduced since the current pulses are ½ the magnitude of power stage 1+2 TPS54350 TPS5538x TPS54550 TPS5428x Related Devices t t t
- 18. DDR Memory Active Bus Termination Part Number Topology Vin (V) Iout (A) Provides DDR TPS54372 TPS54672 TPS54972 Switcher with integrated FETs SWIFT 3 to 6 3 VTT 1, 2, 3 3 to 6 6 VTT 1, 2, 3 3 to 4 9 VTT 1, 2, 3
Editor's Notes
- This is a training module for Swift Step Down DC/DC Converters
- Welcome to the training module on Texas Instruments Understanding SWIFT TM step Down DC/DC Converters. This training module introduces the SWIFT DC/DC Converters with integrated FETs.
- A typical line powered block diagram is powered from an AC source, but may also have a battery back up in the system. After the AC line voltage is rectified to a DC voltage, it may be boosted to a high DC voltage to correct the power factor. Then, that DC voltage is down-converted by the PWM Controller and MOSFET drivers to an intermediate bus voltage such as 12, 5, or 3.3 Volts. Afterwards, the point of load regulation power solution can be provided by switching controllers, converters (with internal FETs), linear regulators, or plug in power modules, depending on the application’s needs. Other functions, like voltage supervision and sequencing, can help solve specific problems that a particular load requires. This training module will discuss SWIFT DC/DC Converters with integrated FETs in depth as highlighted by the red circle.
- DC/DC converters have advantages and disadvantages compared to a Low Drop Out regulator (LDO) or a DC/DC Controller with external FETs. A DC/DC Converter with integrated FETs is usually more efficient than an LDO. An LDO’s efficiency is calculated by the output voltage divided by the input voltage. When the output voltage is very low in relation to the input voltage, LDOs are not practical. For 5V input and 1.2V output, the efficiency of an LDO is 24%. A typical DC/DC converter efficiency would be around 80-90%. Since a DC/DC converter is switching off and on quickly, noise is generated as the chopped signal is applied to an inductor and capacitor energy storage filter. LDOs do not switch, so they are quieter than a DC/DC converter. Since LDOs do not need an inductor to store energy, they take up less board space. DC/DC converters are easier to use than DC/DC controllers with external MOSFETs. Selecting and designing with MOSFETs can be cumbersome and require debug time. Additionally, the circuit board trace from the controller to the MOSFET is noise sensitive and a good layout is vital for the power supply to work properly. Many DC/DC converters are internally compensated and do not require extra components or calculations to determine stability of the power supply. Not only do DC/DC converters integrate the MOSFET, but many will eliminate the need for external resistors and capacitors in the feedback loop. Fewer components also save board area. DC/DC converters with the FETs integrated save time and money, but may have a cost adder associated with them. When the output current requirement is beyond the capabilities of DC/DC converters on the market, the designer has no choice but to use a DC/DC controller and design with larger power MOSFETs.
- A typical block diagram for a step down, or buck regulator topology is shown. The main components are Q1, the top side power MOSFET; L1, the inductor; and C1, the output capacitor. For a synchronous buck topology, Q2, the low side MOSFET is used. In a non-synchronous buck topology, a power diode D1 is used. A synchronous buck converter will have higher efficiency than a non-synchronous buck converter with equal top side MOSFET resistance. When the MOSFET Q2 is conducting, the voltage drop is less than the diode D1, almost by 0.5V in many cases. When current flows through the MOSET or Diode, the lower voltage will dissipate less power. For example, at 1A, the MOSFET will dissipate 300mW (0.3V drop times 1A), and the diode will dissipate 700mW (0.7V drop times 1A). During lower duty cycles when the low side MOSFET or diode is conducting most of the time, the synchronous buck converter’s higher efficiency will be more pronounced due to the higher voltage drop. On the other hand, a synchronous buck converter is more complex and care has to be taken to make sure that both MOSFETs do not turn on during the same time cycle. This causes shoot-thru current, which can reduce the efficiency, or worse, cause smoke. Synchronous buck converters employ a dead time scheme to ensure that the top and low side MOSFETs are never on at the same time. Note that the power diode is not integrated, but the low side power MOSFET is often integrated. A diode integrated within the package would hamper the package power dissipation performance of the power supply.
- Now let’s look at how the synchronous buck converter charges the inductor. When Q1 is on and Q2 is off, current is allowed to flow through the inductor and charge the Output Capacitor while transferring energy to the load. With the phase node high, the graphs on the bottom show the phase node high and the output voltage rising. Since the capacitor has charged and energy is stored in the inductor, the power supply is ready to turn off Q1 and turn on Q2. In the non synchronous case, a diode would replace Q2, and current would not be allowed to flow through the diode either, so the behavior of the circuit is similar.
- During the discharge state, the top FET Q1 is off and the bottom FET Q2 is on. Power is not coming from the power source any more; it is coming from energy stored in the inductor and capacitor. The graphs below show the phase voltage at zero and the output voltage dropping. The cycle will repeat itself as Q1 and Q2 turn off at a set frequency. In the case of a non-synchronous converter where a power diode replaces Q2, the current would be allowed to flow through the diode in a similar fashion, but the power loss would be higher due to the higher voltage drop as previously explained. Note that by not drawing power from the source, the efficiency is higher than a linear regulator, which always draws power from the source. A switching DC/DC converter uses stored energy to supply power to the load to save energy.
- Features of a DC/DC converter solve many problems and improve performance in certain applications. This list shows the most popular features that are included in SWIFT DC/DC converters. Not all features are included in every device, but knowing the problem can help choose the right DC/DC converter for the application.
- The list of features are designed to provide a performance oriented power supply and solve problems in the application. First, some pin features will be highlighted. PG stands for a power Good pin that has a logic high level output when the power supply is in regulation; Sync indicates that the switching frequency is synchronizable to a master clock. UVLO indicates the device has an under voltage lock out feature allowing the device to be programmed to a voltage level at which the device will begin it’s start up sequence. LSG indicates that the device has a low side MOSFET gate driver to allow an optional low side FET instead of a diode for higher efficiency. An RT pin allows the frequency to be programmed. Many devices are pin compatible for scalability. Scalability is useful when the output current requirement changes suddenly, requiring less redesign. Wide input devices are usually designed for a 12, 5, or 3.3V output voltages and apply mostly for logic needs. Wide input devices also provide protection from line transients that can come from motors, relays or load dump situations. Industrial applications typically use wide input voltage devices. Mid input voltage devices are designed for FPGA and DSP power from a 12V rail. Their output voltage can be as low as 0.8V with tight 1% regulation accuracy. Dual converters have a unique sequencing pin and a selectable current limit on output #2. Low input voltage devices are also intended for FPGA and DSP regulation.
- To help eliminate beat noise, some SWIFT DC/DC converters can be synchronized to an external clock frequency. The bottom waveform shows 2 signals switching at slightly different frequencies. The difference is shown by the low beat frequency red line. This low beat frequency can show up in several places on the circuit board as a nuisance. Synchronizing the switching frequencies can eliminate this beat noise and is successfully implemented in noise sensitive applications, such as medical imaging and audio end equipments. Connect the sync pin of the DC/DC converters to the master clock and all will switch at the same frequency.
- Heavy load requirements during start-up and/or fast initial charging of bypass capacitors may result in a surge current. For example, when a power supply is charging up processor bypass capacitors, the load can look like a short circuit as the capacitors charge up. This results in an inrush current spike, shown as Iss. If the current spike is too high as shown with Ipk, the current limit of the power supply may trip and cause the power supply to limit the current or the power supply may shut down and restart, depending on the current limit technique implemented by the DC/DC converter. The worst case situation is that another component of the power supply overstresses due to the excessive current flow. To solve this problem, the power supply can be oversized to accommodate the inrush current level, or a SWIFT DC/DC converter with an adjustable soft-start can be implemented to slow down the charging of the bypass capacitors, as shown in the waveform rising to Vcore.
- Eco-mode is a feature that automatically reduces the switching frequency at light loads. It takes energy to turn on the power MOSFETs and to operate the integrated circuit. If the quiescent current and switching frequency are reduced during light loads, the overall efficiency will increase. The graph on the right shows a fixed frequency PWM operating at 500kHz. As the load requirement is reduced, the MOSFET driver, gate charge, and quiescent current losses begin to dominate in the efficiency calculation because the IC is still operating and the MOSFETs are still switching even though less power is delivered to the load. For example, at 10mA, the efficiency is around 35% with the TPS5430. With the Eco-mode efficiency plot on the left hand side, the frequency is reduced and the MOSFET driving and gate charge losses are also automatically reduced delivering higher efficiency. For example, at 10mA, the efficiency is now around 70% with Eco Mode.
- There are two types of compensation schemes with SWIFT devices. Internal compensation is the easier scheme to implement. The compensation is integrated within the IC allowing fewer components. However, the required inductor and capacitor may be larger than an external compensation scheme and require more board area. Since the compensation is designed with the IC, the choice of the output inductor and capacitor are limited to ensure stability. External compensation requires complex loop compensation calculations but allows much more flexibility with the choice of output inductor and capacitor. Small resistors and capacitors are required to compensate the phase lead-lag scheme, but the result is a more optimized solution for a better transient response performance. At any rate, the SwitcherPro software design tool can help the user calculate the compensation components form externally compensated versions or select suitable inductor and capacitor to ensure stability with internally compensated SWIFT devices. You can download the software from TI site.
- This page shows what happens when a DC/DC converter that switches 180 degrees out of phase with another DC/DC Converter. The top 2 waveforms show 2 separate power stages switching at the same frequency. The input current is drawn at the same time which yields an input current waveform shown in the 3 rd waveform from the top as the sum of the power stages 1 and 2. If the DC/DC converters are synchronized to switch 180 degrees out of phase, the input current pulses occur at a different time interval as shown on the bottom waveform. This means that the power supply needs to be designed to handle the ripple of only one power supply resulting in less input capacitance. Therefore, capacitance cost and board space are saved.
- SWIFT devices are available in single and dual outputs, and each has it’s own merits. When considering a dual converter, make sure that the distance to each load is close, otherwise PCB trace loss can affect the accuracy of the voltage, and improper placement of the output capacitors can affect stability of the power supply. Also, 2 converters in one package will dissipate more heat, so make sure there is enough copper on the PCB or airflow to keep the increased temperature in check. On the other hand, when considering 2 singles, it may be better to use a dual converter. If the converters are switched 180 degrees out of phase, the input current ripple will be less allowing less capacitance and board space savings. The top input current waveforms show that 2 capacitors will be needed when 2 converters are switched in phase. The lower waveform shows a lower peak current that one capacitor can handle.
- This graph shows the affect of a faster switching frequency. A faster frequency decreases the efficiency since the switching and FET driving losses are greater. On the other hand, since the pulses are closer together, less energy needs to be stored, so a smaller L & C filter can be chosen to save board space. At 1.6MHz, a smaller design is shown with a smaller output capacitor and inductor size and value. As the frequency is lowered, it takes more inductance and capacitance to store energy. These 3 designs are each optimized for size based on the switching frequency chosen. The devices shown at the bottom are SWIFT devices that can switch at or greater than 1MHz.
- Some performance processors, such as DSPs, FPGAs, and ASICs require sequencing as noted in their datasheets. Implementing power supply sequencing is good design practice as it can help stagger the turn on of multiple power rails to reduce the inrush burden of the upstream power source. Many processor suppliers are good about indicating the sequencing requirements in their datasheets. Sequencing requirements are provided to help designers with problems such as inrush currents and proper start up sequence for the core and I/O of the processor, such as a monotonic start up waveform. Sequencing can be implemented discretely, such as programming the proper soft-start time or using a dedicated power supply sequencer. SWIFT devices with sequencing built in can be chosen as well to reduce component count. A simple scheme for sequencing is performed by using the power good pin of one supply to activate the enable pin of another supply.
- Texas Instruments has a full portfolio for powering DDR (Double Data Rate) memory. DDR memory requires 2 supplies; VTT and VDDQ. VTT is a special case and must track VDDQ within 3% and be able to source and sink current. VTT must also be ½ VDDQ for DDR memory. VDDQ can be a separate dedicated supply or come from another point of load DC/DC converter. All of these devices will support DDR1, DDR2, and DDR3. DDR2, for example has a VDDQ of 1.8V and a VTT of 0.9V. The 0.9V must track the variations of 1.8V within 3% and be able to source and sink current.
- To aid in the design of a SWIFT device, SWITCHERPRO tool is available to automatically select the external components, such as the inductor, input and output capacitors, and even the compensation components, based on design requirements entered by the user. Once a schematic has been presented, the user can modify the components and optimize the design. A stress test, bode plot showing gain and phase margin, efficiency plot, bill of material spreadsheet, and a recommended layout are all quickly displayed. A What-If analysis can be performed to change the conditions of the power supply, such as the switching frequency and other parameters for the inductor and capacitors. The tool can either be used on line, or downloaded onto the users personal computer.
- Thank you for taking the time to view this presentation on “ Understanding SWIFT TM Step Down DC/DC Converters” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Texas Instrument site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.