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DOCUMENT FORMAT
• Abstract:
• Introduction:
• Literature Survey:
• System Analysis:
• Existing System:
• Disadvantages:
• Proposed System:
• Advantages:
• System Requirements:
• Block Diagram:
• Working Flow Diagram:
• Circuit Diagram:
• Implementation:
• Modules Description:
• System Study:
• System Testing:
• Software Description:
• Sample code:
• Conclusion:
• Future Enhancement:
• References:
OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD
CELL: +91 99436 99916 / 99436 99926 / 99436 99936
DESIGN OF A LOW-VOLTAGE LOW-
DROPOUT REGULATOR
TITLE
OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD
CELL: +91 99436 99916 / 99436 99926 / 99436 99936
ABSTRACT
A low-voltage low-dropout (LDO) regulator that converts an input of 1 V to an output
of 0.85–0.5 V, with 90-nm CMOS technology is proposed. A simple symmetric
operational transconductance amplifier is used as the error amplifier (EA), with a
current splitting technique adopted to boost the gain. This also enhances the closed-
loop bandwidth of the LDO regulator. In the rail-to-rail output stage of the EA, a power
noise cancellation mechanism is formed, minimizing the size of the power MOS
transistor
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CONTACT
MOBILE No:
99436 99916
99436 99926
99436 99936
E Mail:
i3eprojectskarur@gmail.com
Web:
www.i3etechnologies.com
www.i3eprojects.com
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ADDRESS
#23A, 2nd Floor SKS Complex,
Bus Stand Opp. Karur-639 001.
OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD
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Course
Embedded System,
PLC,
MATLAB,
Hardware & Networking.
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Low-voltage LDO regulator design document

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  • 2. DOCUMENT FORMAT • Abstract: • Introduction: • Literature Survey: • System Analysis: • Existing System: • Disadvantages: • Proposed System: • Advantages: • System Requirements: • Block Diagram: • Working Flow Diagram: • Circuit Diagram: • Implementation: • Modules Description: • System Study: • System Testing: • Software Description: • Sample code: • Conclusion: • Future Enhancement: • References: OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD CELL: +91 99436 99916 / 99436 99926 / 99436 99936
  • 3. DESIGN OF A LOW-VOLTAGE LOW- DROPOUT REGULATOR TITLE OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD CELL: +91 99436 99916 / 99436 99926 / 99436 99936
  • 4. ABSTRACT A low-voltage low-dropout (LDO) regulator that converts an input of 1 V to an output of 0.85–0.5 V, with 90-nm CMOS technology is proposed. A simple symmetric operational transconductance amplifier is used as the error amplifier (EA), with a current splitting technique adopted to boost the gain. This also enhances the closed- loop bandwidth of the LDO regulator. In the rail-to-rail output stage of the EA, a power noise cancellation mechanism is formed, minimizing the size of the power MOS transistor OUR OFFICES @ CHENNAI / TRICHY / KARUR / ERODE / MADURAI / SALEM / COIMBATORE /BANGALORE / HYDRABAD CELL: +91 99436 99916 / 99436 99926 / 99436 99936
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