While the IEEE 754-2018 revision aims at fixing specification problems, the committee has encountered many issues for future improvement. For example, the recommended reduction operations are not useful in building parallel versions of the same operations. And should any of the recommended operations ``graduate'' to required? Required become recommended? Plus the eternal NaN versus missing debate. These are the simpler issues,unfortunately. Emerging new architectures present new / old challenges. Low-precision computations in deep learning may not find the IEEE 754 16-bit interchange format appropriate. Memory-centric architectures couple lightweight processors with integrated memory and do not always provide full IEEE 754 semantics. FPGAs have become more accessible to software developers through OpenCL compilers and other high-level languages, and sometimes developers do not understand the unfortunate subtleties of limited precision. More exotic technologies like neuromorphic and quantum computing may only find the IEEE 754 interchange formats useful, but that does not necessarily help software developers adapt. These technologies exist now. The interest in new architectures to scale current performance and energy walls is great but threatens to throw us back into the days when each had its own arithmetic peculiarities. The computer arithmetic community has the experience to address some of these issues. And IEEE 754-2028 is a good venue for combining current novel architectural ideas with the community's experience.

1. Plans for IEEE Standard 754-2028
E. Jason Riedy
Georgia Institute of Technology
25th IEEE Symposium on Computer Arithmetic, 26 June 2018

2. Outline
Smaller Work Items
Documenting Decisions
Graduating / Retiring Functionality
Debatable Decisions
Bigger Picture Items
Ubiquitous Parallelism
New Driving Applications: Machine Learning
Oddball Architectures
IEEE Standardization Process
Summary
IEEE 754-2028? — ARITH 25, 26 June 2018 1/12

3. Smaller Work Items

4. Documenting Decisions
• 1985 was good
• Many publications detailing decisions
• 2008 was not
• Oral history
• Minutes (thanks to David Bindel)
• Some email archives
• 2018 will be better
• Working notes to be available
• Ramp up to 2028?
IEEE 754-2028? — ARITH 25, 26 June 2018 2/12

5. Graduating Recommendations?
Which recommended operations graduate?
• Fixed min/max?
• Correctly rounded special functions?
• Augmented arithmetic operations?
• Reductions? (to be mentioned later)
• NaN payload operations?
Oh, and “security.”
IEEE 754-2028? — ARITH 25, 26 June 2018 3/12

6. Retiring Unused Pieces?
• Extended and extensible precisions?
• Nail down underflow?
• (Sure others will have more opinions...)
I’m dodging new inclusions for now.
IEEE 754-2028? — ARITH 25, 26 June 2018 4/12

7. Debatable Decisions
• Special function special cases
• Power, xy. All the joy for integral values of y.
• Preference for conformal mappings
• “Much ado about nothing’s sign bit...”
• abs, negate as numeric rather than “bit”?
• So raise invalid on signaling NaNs.
• What about copy? Traditionally left to
implementations.
IEEE 754-2028? — ARITH 25, 26 June 2018 5/12

8. NaN v. “Missing”
The endless argument. Not now.
Clearly there’s a need, but there is no clear path.
IEEE 754-2028? — ARITH 25, 26 June 2018 6/12

9. Bigger Picture Items

10. Ubiquitous Parallelism
• We need compose-able operations.
• Recommended reduction operations cannot be used
to build higher-level parallel operations.
• Reproducibility in the face of dynamic scheduling.
• Traps are out already, replaced by alternate
exception handling.
• Can a more data-flow approach help?
• And then there’s energy use...
IEEE 754-2028? — ARITH 25, 26 June 2018 7/12

11. Driving Apps in Machine Learning
• binary16: The right split?
• binary8? binary5?
• Will five-eight years be enough for convergence?
• (Vanishing gradients are an issue.)
• And there is little numerical analysis...
IEEE 754-2028? — ARITH 25, 26 June 2018 8/12

12. Oddball / Novel Architectures
• Accelerators (via CAPI, NVLINK, ...)
• “Easy” FPGA programming: OpenCL,
Chisel, SPIRAL
• Data-centric, memory-centric proposals
and systems
• Quantum, neuromorphic, analog
What are the arithmetic and debugging considerations?
Testbeds:
• CRNCH Rogues Gallery
at Georgia Tech
• CENATE at PNNL
• ExCL at ORNL
• JLSE at Argonne
• ASC at Sandia
IEEE 754-2028? — ARITH 25, 26 June 2018 9/12

13. Novel Architectures Still Need FPUs
• Not well taught
• Many analyses do not support “special cases” like
overflow (not naming names)
• Others never even try running paranoia, etc.
• Thankfully hardfloat / rocket core exists
IEEE 754-2028? — ARITH 25, 26 June 2018 10/12

14. IEEE Standardization Process

15. Overall IEEE Process
1. PAR: Project Authorization Request, defines scope
• Current revision’s PAR includes backwards
compatibility.
2. Form a committee.
• Officers: Chair, vice chair, secretary, editor. Lacking...
3. Then, eventually, agree to send a revision to the
sponsor (MSC).
IEEE 754-2028? — ARITH 25, 26 June 2018 11/12

16. Summary

17. Summary
There’s work to do.
There’s thinking involved. Correct scope?
And effort. (Committee officers...)
Timeframe: 2023 for a PAR if desired.
And if we’re optimistic about five years being enough
time to find convergence, then again time to decide.
IEEE 754 is not the only approach.
Can have others!
IEEE 754-2028? — ARITH 25, 26 June 2018 12/12