This document describes a low power CMOS voltage regulator designed for a wireless blood pressure biosensor. It uses a classical linear low-dropout regulator topology powered by an RF link to minimize transmitted power and thermal effects on tissues. The voltage regulator was implemented in a 0.35-μm CMOS process and tested. It regulates the output to 1V, supplies up to 0.5mA of load current at 37°C, and has a total power consumption of 1.2mW. Load and line regulations are 13mV/mA and 39mV/V respectively.

1. A Low power CMOS Voltage Regulator for Wireless Blood pressure Biosensor
DEPT OF E&C i CEC
ABSTRACT
A CMOS implementation of a linear voltage regulator (LVR) used to power up
implanted physiological signal systems, as it is the case of a wireless blood pressure
biosensor. The topology is based on a classical structure of a linear low-dropout
regulator. The circuit is powered up from an RF link, thus characterizing passive radio
frequency identification (RFID) tag. The LVR was designed to meet important features
such as low power consumption and small silicon area, without the need for any external
discrete components.
The low power operation represents an essential condition to avoid a high-energy
RF link, thus minimizing the transmitted power and therefore minimizing the thermal
effects on the patient’s tissues. The project was implemented in a 0.35-μm CMOS
process, and the prototypes were tested to validate the overall performance. The LVR
output is regulated at 1 V and supplies a maximum load current of 0.5 mA at 37◦C. The
load regulation is 13mV/mA, and the line regulation is 39 mV/V. The LVR total power
consumption is 1.2 mW.

2. A Low power CMOS Voltage Regulator for Wireless Blood pressure Biosensor
DEPT OF E&C ii CEC
CONTENTS
1. Introduction……………………………………………..01
2. Literature Survey………………………………………..03
3. LVR CIRCUIT TOPOLOGY………………………………..04
4. FRONT-END INTERFACE………………………………….........06
5. OTA……………………………………………………....08
6. LVR VOLTAGE REFERENCES…………………………..…......09
7. SAMPLER CIRCUIT………………………………………….......13
8. STABILITY ANALYSIS…………………………………....17
9. LVR MEASUREMENTS………………………………..…..18
10.Conclusion…………………………………………..…...21
Bibliography……………………………………………..22

3. A Low power CMOS Voltage Regulator for Wireless Blood pressure Biosensor
DEPT OF E&C iii CEC
LIST OF FIGURES
1. Simplified diagram of an RFID BID…………………………………………..02
2. Block diagram of the blood pressure monitoring system………………….....02
3. Simplified diagram of the proposed LVR……………………………………...05
4. LVR front-end interface…………………………………………………….….07
5. Rectifier simulation results for average value and ripple…………………....07
6. OTA circuit……………………………………………………………………...07
7. Proposed voltage reference circuit…………………………………………….07
8. Composite structure of two NMOS transistors to generate VREF………....10
9. Adjustment of the aspect ratio of MNREF1 by simulation………………….10
10. Inset of start-up circuit…………………………………………………………11
11. Simulation of the start-up current…………………………………………......11
12. Voltage reference VREF step response………………………………………..12
13. Voltage reference VG step response…………………………………………...12
14. Sampler circuit……………………………………………………………...…..13
15. Classic PMOS LDO with discrete frequency compensation scheme………..14
16. Frequency response of a PMOS LDO regulator with external compensation
capacitor…………………………………………………………………………14
17. Proposed topology to set a dominant pole in the LVR system……………….15
18. Proposed voltage regulator highlighting the open-loop
point………...............................................................................................16
19. Small signal circuit to determine the loop gain……………………………….16
20. Frequency response of the proposed LVR…………………………………….16
21. Microphotography of the chip………………………………………………....19
22. Basic circuit for the LVR measurements………………………………….......19
23. Step function response at IL = 0.5 mA and T = 37◦C………………………...20
24. Monte Carlo analysis of the LVR output voltage……………………..……...20