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Pari vallal Kannan
Center for Integrated Circuits and Systems
University of Texas at Dallas
8051 Microcontroller –
Architecture, Intro to Assembly
Programming
EE4380 Fall 2002
Class 2
29-Aug-02 2
Class –2: Objective
l 8051 internal architecture
l Register Set
l Instruction Set
l Memory Map
l Intro to Stack, SFRs
l Assembly language programming
29-Aug-02 3
8051 Architecture
l Programmer’s View
– Register Set
– Instruction Set
– Memory map
l Hardware Designer’s View
– Pinout
– Timing characteristics
– Current / Voltage requirements
29-Aug-02 4
Programmer’s View – Register Set
l Registers
– A, B, R0 to R7 : 8 bit registers
– DPTR : [DPH:DPL] 16 bit register
– PC : Program Counter (Instruction Ptr) 16bits
– 4 sets of register bank R0-R7
– Stack pointer SP
– PSW : Program Status Word (a.k.a Flags)
– SFR : Special Function Registers
l Control the on-board peripherals
29-Aug-02 5
Assembly – Absolute Basics
l Intel Assembly format
Operation destination source ; comment
l Values are to be preceded by a # sign
– #55, #32 etc
l Hex values are to be followed by H
– #55H, #32H
l If the first figure in a hex quantity is a letter (A-F) then a
0 must precede it
– #0FFH, #0C1H, #0D2H
l No operation : NOP !
29-Aug-02 6
Register Set – Accumulator A, ACC
l Commonly used for mov and arithmetic
l Implicitly used in opcodes or referred to as
ACC or by its SFR address 0E0H
l Example of Implicit reference
– Instruction : mov A, R0 (copy contents of R0 to A)
– Opcode : E8
– The Accumulator is implicitly coded in the opcode
l Explicit reference to Accumulator
– Instruction : push ACC
– Opcode: C0 E0
29-Aug-02 7
Register Set – B Register
l Commonly used as a temporary register, much
like a 9th R register
l Used by two opcodes
– mul AB, div AB
l B register holds the second operand and will
hold part of the result
– Upper 8bits of the multiplication result
– Remainder in case of division
29-Aug-02 8
Register Set – R0 to R7
l Set of 8 registers R0, R1, … R7, each 8 bit
wide
l Widely used as temporary registers
l Available in 4 banks (effectively 4x8 registers)
l Bank is chosen by setting RS1:RS0 bits in
PSW
l Default bank (at power up) is the bank0
29-Aug-02 9
Registers - DPTR
l 16 bit register, called Data Pointer
l Used by commands that access external
memory
l Also used for storing 16bit values
mov DPTR, #data16 ; setup DPTR with 16bit ext address
movx A, @DPTR ; copy mem[DPTR] to A
l DPTR is useful for string operations, look up
table (LUT) operations
29-Aug-02 10
Registers - PC
l PC is the program counter
l Referred to as the Instruction Pointer (IP) in other
microprocessors
l PC points to the next program instruction always
l After fetching an instruction (1 or multi byte), PC is
automatically incremented to point to the next
instruction
l Cannot directly manipulate PC (exceptions JMP
statements)
l Cannot directly read contents of PC (tricks available)
29-Aug-02 11
Registers - SP
l SP is the stack pointer
l SP points to the last used location of the stack
– Push operation will first increment SP and then copy data
– Pop operation will first copy data and then decrement SP
l In 8051, stack grows upwards (from low mem to high
mem) and can be in the internal RAM only
l On power-up, SP is at 07H
l Register banks 2,3,4 (08H to 1FH) is the default stack
area
l Stack can be relocated by setting SP to the upper
memory area in 30H to 7FH
– mov SP, #32H
29-Aug-02 12
Registers - PSW
l Program Status Word is a “bit addressable” 8bit
register that has all the flags
l CY - Carry Flag
– Set whenever there is a carry in an arithmetic operation
l AC - Aux. Carry Flag
– Carry from D3 to D4. Used for BCD operation
l P - Parity Flag
– P=1 if A has odd number of 1s
– Even parity
l OV - Overflow Flag
– Set if any arithmetic operation causes an overflow
29-Aug-02 13
Flags - Illustration
l Addition example
38 0011 1000
+ 2F 0010 1111
--------- ---------------
67 0110 0111
--------- ---------------
CY = 0
AC = 1
P = 1
29-Aug-02 14
Registers - SFRs
l Control the operation
of on-board
peripherals
l Special Function
Registers at direct
addresses 80H to FFH
l 8051 Clones may have
additional SFRs
29-Aug-02 15
8051 - Memory Map
l Internal ROM is vendor dependant
l On power-up PC starts at 0000H in
ROM space
MOVC
MOVC, MOVX
MOVX A, @DPTR
MOV A, xxH
InstructionSignalEndStartMemory
Type
????H0000HInternal ROM
PSENFFFFH0000HExternal
ROM
RD,
WR
FFFFH0000HExternal RAM
7FH00HInternal RAM
29-Aug-02 16
8051 – Instruction Set
l Data Transfer
– Move/Copy data from one location to another
– mov, movc, movx, push, pop, xch, xchd
l Logical
– Perform logic operations on data
– anl, orl, xrl, clr, cpl, rl, rlc, rr, rrc, swap
l Arithmetic
– Perform arithmetic operations on data
– add, addc, subb, inc, dec, mul, div
l Program control
– Control the program flow (jumps, subroutine calls)
– jmp, ajmp, ljmp, sjmp, jc, jnc, jb, jnb, jbc, jz, jnz, acall, lcall,
cjne, djnz, ret, reti
l NOP
29-Aug-02 17
8051 Assembly Introduction
l Assembly statement structure
[label:] opcode [operands] [;comment]
l Example
start: mov A, #D0H ;code starts here
l Assembler directives
– ORG xxxxH : origin, start assembling at xxxxH
– EQU : define a constant
l count EQU 25
– DB : define byte, defines data
l DATA1: DB 28
l DATA2: DB “hello world”
– END : end of assembly file
29-Aug-02 18
Assembly Design Flow
l Create the assembly source file test.asm
l Assemble the asm file
– as51 test.asm
– Assembler produces error and code list in test.lst
– If no errors, assembler produces .obj file
l Link the .obj files to produce an .abs file
l Create hex file from the .abs file
l Most assemblers directly produce the .hex file
l Download the .hex file onto the board or burn it into an
eprom.
29-Aug-02 19
Assembly Example #1
l Target 8051 dev system
– Std 8051 device
– 2K on-chip ROM running
a monitor program
– 32K external RAM at
address 0x0000 to
0x7FFF
– This RAM is both code
and data
– First 0x30 locations in
external RAM is
dedicated for the Interrupt
Vector Table (IVT)
l Program to fill up the first 4 registers in the
register bank with some numbers and find their
sum
ORG 0x30 ;skip the IVT area
Start: mov R0, #10
mov R1, #0A5H
mov R2, #1
mov R3, #0x20
clearA: mov A, #0 ;now A = 0
Addup: add A, R0 ;now A = A + R0
add A, R1
add A, R2
add A, R3
mov R4, A ;store sum in R4
mov DPTR, #7FFF
movx @DPTR, A ;store in ext. mem
Done: sjmp done ;loop here forever
END
29-Aug-02 20
Class –2 Review
l What are the different views/models of a uP ?
l What are the registers available in the 8051 ?
l What are the functions of the 8051 registers ?
l What is stack, PC, SFR, PSW/Flags ?
l What is an instruction set ?
l What is a memory map ? Why is it needed ?
l What is an assembly language program ? How
does it look ?

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Class2

  • 1. Pari vallal Kannan Center for Integrated Circuits and Systems University of Texas at Dallas 8051 Microcontroller – Architecture, Intro to Assembly Programming EE4380 Fall 2002 Class 2
  • 2. 29-Aug-02 2 Class –2: Objective l 8051 internal architecture l Register Set l Instruction Set l Memory Map l Intro to Stack, SFRs l Assembly language programming
  • 3. 29-Aug-02 3 8051 Architecture l Programmer’s View – Register Set – Instruction Set – Memory map l Hardware Designer’s View – Pinout – Timing characteristics – Current / Voltage requirements
  • 4. 29-Aug-02 4 Programmer’s View – Register Set l Registers – A, B, R0 to R7 : 8 bit registers – DPTR : [DPH:DPL] 16 bit register – PC : Program Counter (Instruction Ptr) 16bits – 4 sets of register bank R0-R7 – Stack pointer SP – PSW : Program Status Word (a.k.a Flags) – SFR : Special Function Registers l Control the on-board peripherals
  • 5. 29-Aug-02 5 Assembly – Absolute Basics l Intel Assembly format Operation destination source ; comment l Values are to be preceded by a # sign – #55, #32 etc l Hex values are to be followed by H – #55H, #32H l If the first figure in a hex quantity is a letter (A-F) then a 0 must precede it – #0FFH, #0C1H, #0D2H l No operation : NOP !
  • 6. 29-Aug-02 6 Register Set – Accumulator A, ACC l Commonly used for mov and arithmetic l Implicitly used in opcodes or referred to as ACC or by its SFR address 0E0H l Example of Implicit reference – Instruction : mov A, R0 (copy contents of R0 to A) – Opcode : E8 – The Accumulator is implicitly coded in the opcode l Explicit reference to Accumulator – Instruction : push ACC – Opcode: C0 E0
  • 7. 29-Aug-02 7 Register Set – B Register l Commonly used as a temporary register, much like a 9th R register l Used by two opcodes – mul AB, div AB l B register holds the second operand and will hold part of the result – Upper 8bits of the multiplication result – Remainder in case of division
  • 8. 29-Aug-02 8 Register Set – R0 to R7 l Set of 8 registers R0, R1, … R7, each 8 bit wide l Widely used as temporary registers l Available in 4 banks (effectively 4x8 registers) l Bank is chosen by setting RS1:RS0 bits in PSW l Default bank (at power up) is the bank0
  • 9. 29-Aug-02 9 Registers - DPTR l 16 bit register, called Data Pointer l Used by commands that access external memory l Also used for storing 16bit values mov DPTR, #data16 ; setup DPTR with 16bit ext address movx A, @DPTR ; copy mem[DPTR] to A l DPTR is useful for string operations, look up table (LUT) operations
  • 10. 29-Aug-02 10 Registers - PC l PC is the program counter l Referred to as the Instruction Pointer (IP) in other microprocessors l PC points to the next program instruction always l After fetching an instruction (1 or multi byte), PC is automatically incremented to point to the next instruction l Cannot directly manipulate PC (exceptions JMP statements) l Cannot directly read contents of PC (tricks available)
  • 11. 29-Aug-02 11 Registers - SP l SP is the stack pointer l SP points to the last used location of the stack – Push operation will first increment SP and then copy data – Pop operation will first copy data and then decrement SP l In 8051, stack grows upwards (from low mem to high mem) and can be in the internal RAM only l On power-up, SP is at 07H l Register banks 2,3,4 (08H to 1FH) is the default stack area l Stack can be relocated by setting SP to the upper memory area in 30H to 7FH – mov SP, #32H
  • 12. 29-Aug-02 12 Registers - PSW l Program Status Word is a “bit addressable” 8bit register that has all the flags l CY - Carry Flag – Set whenever there is a carry in an arithmetic operation l AC - Aux. Carry Flag – Carry from D3 to D4. Used for BCD operation l P - Parity Flag – P=1 if A has odd number of 1s – Even parity l OV - Overflow Flag – Set if any arithmetic operation causes an overflow
  • 13. 29-Aug-02 13 Flags - Illustration l Addition example 38 0011 1000 + 2F 0010 1111 --------- --------------- 67 0110 0111 --------- --------------- CY = 0 AC = 1 P = 1
  • 14. 29-Aug-02 14 Registers - SFRs l Control the operation of on-board peripherals l Special Function Registers at direct addresses 80H to FFH l 8051 Clones may have additional SFRs
  • 15. 29-Aug-02 15 8051 - Memory Map l Internal ROM is vendor dependant l On power-up PC starts at 0000H in ROM space MOVC MOVC, MOVX MOVX A, @DPTR MOV A, xxH InstructionSignalEndStartMemory Type ????H0000HInternal ROM PSENFFFFH0000HExternal ROM RD, WR FFFFH0000HExternal RAM 7FH00HInternal RAM
  • 16. 29-Aug-02 16 8051 – Instruction Set l Data Transfer – Move/Copy data from one location to another – mov, movc, movx, push, pop, xch, xchd l Logical – Perform logic operations on data – anl, orl, xrl, clr, cpl, rl, rlc, rr, rrc, swap l Arithmetic – Perform arithmetic operations on data – add, addc, subb, inc, dec, mul, div l Program control – Control the program flow (jumps, subroutine calls) – jmp, ajmp, ljmp, sjmp, jc, jnc, jb, jnb, jbc, jz, jnz, acall, lcall, cjne, djnz, ret, reti l NOP
  • 17. 29-Aug-02 17 8051 Assembly Introduction l Assembly statement structure [label:] opcode [operands] [;comment] l Example start: mov A, #D0H ;code starts here l Assembler directives – ORG xxxxH : origin, start assembling at xxxxH – EQU : define a constant l count EQU 25 – DB : define byte, defines data l DATA1: DB 28 l DATA2: DB “hello world” – END : end of assembly file
  • 18. 29-Aug-02 18 Assembly Design Flow l Create the assembly source file test.asm l Assemble the asm file – as51 test.asm – Assembler produces error and code list in test.lst – If no errors, assembler produces .obj file l Link the .obj files to produce an .abs file l Create hex file from the .abs file l Most assemblers directly produce the .hex file l Download the .hex file onto the board or burn it into an eprom.
  • 19. 29-Aug-02 19 Assembly Example #1 l Target 8051 dev system – Std 8051 device – 2K on-chip ROM running a monitor program – 32K external RAM at address 0x0000 to 0x7FFF – This RAM is both code and data – First 0x30 locations in external RAM is dedicated for the Interrupt Vector Table (IVT) l Program to fill up the first 4 registers in the register bank with some numbers and find their sum ORG 0x30 ;skip the IVT area Start: mov R0, #10 mov R1, #0A5H mov R2, #1 mov R3, #0x20 clearA: mov A, #0 ;now A = 0 Addup: add A, R0 ;now A = A + R0 add A, R1 add A, R2 add A, R3 mov R4, A ;store sum in R4 mov DPTR, #7FFF movx @DPTR, A ;store in ext. mem Done: sjmp done ;loop here forever END
  • 20. 29-Aug-02 20 Class –2 Review l What are the different views/models of a uP ? l What are the registers available in the 8051 ? l What are the functions of the 8051 registers ? l What is stack, PC, SFR, PSW/Flags ? l What is an instruction set ? l What is a memory map ? Why is it needed ? l What is an assembly language program ? How does it look ?