Multiband Transceivers - [Chapter 6] Multi-mode and Multi-band Transceivers

李健榮助理教授
Department of Electronic Engineering
National Taipei University of Technology
Multiband RF Transceiver System
Chapter 6 Multi-mode and
Multi-band Transceivers

Outline
• System Level Considerations
• Wideband LO Generation
• Building Blocks of TX and RX
• Isolating Techniques on ICs
• RF Power Amplifier
• Two multi-mode examples of the transceiver are
introduced in this chapter.
Department of Electronic Engineering, NTUT2/82

Software-Defined Front-ends
• The ultimate dream of every SDR front-end is to deliver an RF
transceiver that can be reconfigured into every operating mode.
Modes for cellular (2G–2.5G–3G and further), WLAN (802.11a/b/g/n), WPAN
(Bluetooth, Zigbee, etc.), broadcasting (DAB, DVB, DMB, etc.), and positioning
(GPS, Galileo) functionalities. Obviously, each of them has different center
frequency, channel bandwidth, noise levels, interference requirements, transmit
spectral mask, and so on.
• As a consequence, the performances of all building blocks in
the transceiver must be reconfigurable over an extremely
wide range.
Linearity, filtering, noise, bandwidth, and so on, can be traded for power
consumption.

System Level Considerations
• A first choice to be made is the radio architecture to be used.
Heterodyne, homodyne, low-IF, and other architectures, which one to choose?
• In view of SDR, this question perhaps becomes a little easier
to answer.
When the characteristics of all possible standards are taken into account,
not a single IF can be found that suits them all.
Having multiple IFs and the associated (external) filtering stages increases
the hardware cost of the SDR, which cannot be tolerated.
Thus, the direct-conversion architectures are the right choice for the job.

Vision of the SDR Transceiver
• The transceiver core implemented in CMOS includes a fully
reconfigurable direct conversion RX, TX, and two synthesizers
(for FDD).
The functions that cannot be
implemented in CMOS are
included on the package substrate.
These are related primarily to the
interface between the active core
and the antenna. They must
provide high-Q bandpass filtering
or even duplexing, impedance-
matching circuits, and power
amplification.
MEMS switches
Tunable matching
Tunable filtering
Power amplifier
DMQ
VCO
Distr.
DMQ
NoC controller
Frac-N
PLL
Frac-N
PLL
MCM substrate
CMOS IC

Hard Works
• Determine performance specifications for each block.
• The total budget for gain, noise, linearity, and so on, must be
divided over all blocks, ensuring that all possible test cases are
covered for every standard.
• Having very flexible building blocks helps a great deal, but
making a smart system analysis is crucial to obtaining an
optimal solution.
• Gain ranges and signal filtering must be set such that the signal
levels are an optimal trade-off between noise and distortion.
• With the built-in flexibility, a software-defined radio can
achieve state-of-the-art performance very close to that of
dedicated single-mode solutions.

Wideband LO Synthesis
• Example:
To generate all required LO signals in the range 0.1 to 6 GHz,
several frequency generation techniques have been proposed
to relax the tuning range specifications of a voltage-controlled
oscillator (VCO).
They use division, mixing, multiplication, or a combination of these. However,
to make these systems efficient in terms of phase noise and power consumption,
the VCO tuning range still has to be maximized.

Frequency Tuning Capacitor
• Frequency tuning of LC VCOs is commonly done by changing
the capacitance value of the varactors and/or an array of
switched capacitors in the tank.
Switched or controlled inductor designs remain difficult to cover the desired wideband
continuously and to limit the deterioration of the phase noise performance caused by the
insertion of these switches.
• Instead of using a single large varactor to tune the frequency, a
mixed discrete/continuous tuning scheme is usually chosen.
A small varactor is used for fine continuous tuning, and larger steps are realized by
digitally switching capacitors in and out of the resonant tank.
This has two advantages: The VCO gain is lower, allowing easier phase-locked loop
(PLL) design, and digitally switched varactors have a higher ratio between the
capacitance in the on-state (Con) and the capacitance in the off-state (Coff ). A higher
Con/Coff ratio allows a larger VCO frequency tuning range.

Tank Loss Variations
• In the target frequency range (< 5 GHz), the losses in the
oscillator tank are usually dominated by the inductor.
This simplification is, of course, not completely valid, since extra losses due to the
skin effect, for examples will increase the resistance at higher frequencies.
• The negative resistance needed to compensate for the inductor
losses is given by Gm = RS(ωC)2.
• If we want the oscillation frequency to change by a factor of 2:
Total capacitance of the resonant tank has to be changed by a factor of 4
Required negative resistance must also change by a factor of 4.
The transconductance required for the active core is four times higher at the
lower end of the frequency tuning range than at the higher end.

Wideband VCO Architecture
Scale the core biasing current.
Change the transistors sizes.
Keep parasitics at a minimum (phase noise and the
tuning range achievable).
Switches to turn transistors on or off.
Switches has to avoid degrading the oscillator
phase noise as well as to ensure parasitic
capacitances are small.
For lower frequencies, more and more core units
are gradually activated, and the total bias current
increases to keep the oscillation amplitude steady
and the parasitic capacitance increases, helping the
“normal” varactors in their goal to increase the
total tank capacitance.
M1 M2
SW1 SW1
M3 M4
Dunit
Ckvco
Vtune
0
1
1
0
Dtune

Frequency Tuning Sensitivity Variations
• Variation in VCO sensitivity for wide-tuning-range VCOs:
A change in the control voltage Vtune results in a change C in the analog varactor
capacitance Cvar . This causes a change in frequency f :
• The VCO with a frequency ratio of 2, tank capacitance has to
change by a factor of 4, the VCO frequency sensitivity will
then change by a factor 4 √4 = 8.
Such a large change in VCO gain presents serious problems for the design of the
PLL in which it will be incorporated. It prevents keeping the PLL bandwidth
constant and hence endangers the loop stability and an optimal phase noise
performance.
1 1
2 4
f
f
CLC C LCπ π
∆ −
= ⇒ =
∆

0.1 to 6-GHz Quadrature Generation
• The divide/multiply and quadrature (DMQ) contains several
divide-by-2 blocks. They generate I and Q phases down to a
division factor of 32.
DIV2DIV2DIV2DIV2DIV2
PPF
PPF
DIV2
BUF
4G
5G:3G
2G
4G:2G
4G
4G
1G
0.5G
250M
1.5G
125M
• The DMQ further employs a
quadrature-phase single-side
band (SSB) mixer to generate
3GHz, 5GHz.
• The SDR’s LO frequency can
be selected by a multiplexer
integrated in the DMQ.

Receiver Building Blocks
• A key aspect for the receiver RF part is its interference
robustness. The blocking requirements for simultaneous multi-
mode operation imply the need for tunable narrowband circuits
at the antenna interface.
Either this function can be provided by a multi-band filtering block, in which case
the receiver’s input can be a wideband LNA, or part of this burden can be taken up
in the LNA design.

MEMS-Enabled Dual-Band LNA (I)
• Using MEMSs switches to build a low-loss reconfigurable
antenna filter section on a thin-film substrate.
Packaged MEMS switch :
connect the LNA to either
its 1.8 GHz or 5 GHz
matching circuit and
antenna filter. The loss of
the switch is only 0.2 dB.
Cx reduces the gate inductance for the input matching.
At 1.8-GHz, a simple
matching made up of one
or two passive components
can fulfill the matching
requirement.
The bondpad is modeled
by a 65-fF cap in series
with a 50-Ohm resistance.
Each bondwire is modeled
by a 1.3-nH inductance.
Input
Stage
Single
to
Diff.
Conv.
A
BA
B
Gain
Ctrl
5-6
GHz
1.8
GHz
Cx
5-6 GHz
MEMS
SPDT
1.8 GHz
C bp
Low-band
50 -TL Matching
Network
Lbond
Switchable Matching
Network On board On chip
High-band
Freq. [GHz]
0 1 2 3 4 5 6 7 8
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20S11[dB]

MEMS-Enabled Dual-Band LNA (II)
Internally, the LNA
has two separate
outputs to cover the
required frequency
range.
A resistively loaded output is
small in area and wide
bandwidth but can only provide
enough gain at frequencies up
to 2.5 GHz
This output is for the 5 to 6-GHz
band with an LC-tuned load. A
resistor in parallel with this inductor
lowers its Q to cover the 1-GHz
bandwidth.
Gain switching: When the third CG-
transistor is activated, which bypasses a
certain fraction of the signal current to
the power supply so as to reduce the gain.
The overall gain is
24 dB. S11 input
matching better
than −10 dB is
achieved in both
bands. The
simulated LNA NF
is around 2 dB,
while the IIP3
value is −5 dBm in
the low band and 3
dBm in the high
band.
Input
Stage
Single
to
Diff.
Conv.
A
BA
B
Gain
Ctrl
5-6
GHz
1.8
GHz
Cx
5-6 GHz
MEMS
SPDT
1.8 GHz
C bp
Low-band
50 -TL Matching
Network
Lbond
Switchable Matching
Network On board On chip
High-band
Freq. [GHz]
0 1 2 3 4 5 6 7 8
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
S11[dB]

Wideband LNAs (I)
• Rely on the passives in the antenna interface for RF
interference and blocking filtering. This makes the realization
of the concept easier, as commercially available (multi-band)
filtering blocks can be used in the implementation.
• Wideband LNA must now be used that cover an RF frequency
range as large as possible for optimal flexibility, but must still
achieve state-of-the-art performance with respect to
narrowband LNAs.
• Covering the full 100 MHz to 6 GHz frequency range is
challenging since achieving a low NF at hundreds of MHz
requires large transistors with low 1/ f noise
On-chip LC-matched common-source (CS) LNAs typically cover a bandwidth from
3 to 10 GHz. Extending the bandwidth down to 100 MHz would require
prohibitively large inductors and thus chip area.

Wideband LNAs (II)
• Two LNAs are combined to cover the entire frequency range:
An inductor-less feedback LNA with a small form factor covers frequencies from
100 MHz to 2.5 GHz, and a CS LC-matched LNA covers frequencies from 2.5 to 6
GHz. Only one LNA is powered at a time, to save power and provide filtering over
half of the bandwidth.
Resistive Feedback LNA
OUT
IN
C
Bandgap
OUT
IN
VC
Bandgap
LC-Matched LNA

Resistive Feedback LNA – 0.1 ~ 2.5 GHz
A digitally controlled bank of feedback
resistors allows us to switch from high-
to intermediate- and low-gain modes.
The biasing is done with
a 3-bit programmable
current source. This
allows us to vary the
gain in small steps
around the different gain
modes and to decreasing
the power by half when
switching from high- to
low-gain mode.
At a maximum gain of 22 dB, typical simulation results achieve an NF of 2 dB
and an IIP3 of −10 dBm at a power consumption of 12 mW. At reduced gain
(10 dB), the linearity improves to +3 dBm while the power consumption
decreases to 8 mW.
OUT
IN
C
Bandgap
It employs resistive feedback for wideband matching and
noise canceling for low NF over a wide band. It in general
has lower gain and a higher noise figure than these of
inductively matched narrowband designs, but it offers large
savings in area.

LC-Matched LNA – 2.5 ~ 6 GHz
Broadband input-matching is achieved by the inductively degenerated CS-stage into an LC bandpass
filter . Input matching from 6 GHz down to 2.4 GHz can be done with inductive elements of reasonable
values, but extending that frequency band to lower values is practically not feasible.
At the output, a 4-
bit programmable
capacitor bank
provides filtering.
A pullup resistor
is added to obtain
good linearity.
Biasing is done with a
3-bit programmable on-
chip voltage reference.
OUT
IN
VC
Bandgap
Simulated values for NF and IIP3 are 2.4 dB and −10
dBm, at a maximum gain of 22 dB, with a power
consumption of 12 mW.
Gain switching is achieved with a bypass cascode
transistor that diverts a part of the signal current to
the power supply for lower gain without influencing
the input matching

RF
LO
B:1 1:B
RF+ RF-
LO-
LO+ LO+
io+
io-
Wideband Down-Conversion Mixer
• The Gilbert cell is is used for wideband operation up to 6 GHz.
An NMOS input pair is used as a transconductance, driving RF signal
current into the core switch transistors that form the Gilbert cell
The folded switching
PMOSs can reduce
flicker noise. The
extra folding
transistors will
contribute a certain
amount of thermal
noise, causing the
overall receiver’s NF
to deteriorate.
The noise contributions in a switching mixer are not easy to
understand or analyze but can generally be kept within limits
by using large LO signals and reduced dc current through the
switching transistors.
The switchable gain is achieved by
digitally programmable current gain B.
The input must be designed
carefully, as it will determine
both the noise and the
linearity performance of the
mixer.
A considerable biasing
current of 5 mA.

Signal Selection and Dynamic Range
• How to handle: Signal Selection and Dynamic Range
• Signal Selection
Capturing a slice of bandwidth while rejecting adjacent frequencies, which
sometimes contain signals of higher power than the signal of interest.
• Dynamic Range
Defined by the max. and min. signal levels that the receiver can process
without distortion that would degrade the SNR to an unacceptable level.
• Heterodyne Receivers
1. Convert an RF signal into an IF. The IF is passed through high-Q BPFs to
remove undesired signals such as the image and interfering signals.
2. This IF approach works well for systems with defined channel bandwidths.
But large banks of fixed filters would be required to cover the broad range of
possible channels in SDR applications. This is not a practical solution.

Variable-bandwidth Problem
• One possible solution: switched capacitor circuits.
The bandwidth is programmable by varying the capacitor ratio and the clock
frequency of the switched capacitor circuit.
• Another way to handle varying channel bandwidths is with
the use of direct conversion receivers (DCRs).
Since no image frequency is produced, thus RF preselect filters can be
eliminated.
The removal of adjacent channel energy no longer requires high-Q BPFs but
can be accomplished with LPFs, which are much easier to integrate. This is a
great advantage because it is possible to integrate LPFs with programmable
gain and bandwidth in today’s technology.

Problems of DCRs
• Challenges: DC offsets and 1/f noise
• DC offsets are caused primarily by mismatch and/or by LO
signal coupling into the mixer RF port.
The undesired effect is saturation of the following dc-coupled gain stages.
• 1/f noise is the dominant source of noise in MOS transistors at
frequencies below 100 kHz.
In most CMOS processes, PMOS devices have between 2 and 5 times less 1/f
noise than do NMOS devices. Where this is true, PMOS devices should be used
in parts of the circuit where reducing 1/f noise is critical.
Noise has a cumulative effect in a gain lineup, so the gain in the first stage
should be as large as possible.
Chopper stabilization can greatly reduce the effects of any remaining 1/f noise.

Transmitter Building Blocks
• The pre-power amplifier (PPA) is the final block in the SDR
transmit path.
The effective output power is not as high, and for many
applications the average swing is much lower than the peak.
Furthermore, a non-negligible voltage drop across the series
resistance of the inductor sets the dc output voltage below
the power supply.
INN
INP
OUT
The PPA includes extensive
programmability of gain settings.
The output stage is an inductively loaded CS
amplifier with programmable bias current for
optimal linearity vs. power trade-off.

DCFB
IN
OUT
Ref
Programmable Gain PPA
• The pre-power amplifier provides gain programmability.
The core of the amplifier is a CS
stage with a PMOS resistive load.
3 additional PMOS transistors are placed in parallel with the
main load to control the gain. Their gates can be connected to
Vdd , to turn them off and increase the gain, or to ground, to
put them in the linear region and decrease the gain.
Changing the resistive load has an
impact on the dc voltage and so, on its
linearity.
A dc level feedback circuit
(DCFB) controls gate bias (for
enhance linearity).
The total bias current
through the amplifier
can be controlled to
optimize the power
consumption for the
linearity required.
The performance of this
circuit varies widely, of
course, over carrier
frequency, required output
power, bias and gain
settings, and so on.
Simulation results indicate
a total gain range of 50 dB
and typical IM3 distortion
levels of −35 dB at 0-dBm
output power.

Direct Conversion Transmitters (I)
• BB digital process provides complex samples of the encoding
intended, including encryption, pulse shaping, and
linearization preconditioning. These discrete samples are
lowpass-filtered and amplified by the post-baseband (PBB)
amplifier.
Amp
LPF
Amp
LPF
RF
Power
Amp
Differential
Quadrature
LO
I
Q
BaseBanddigitalprocessing
&Digital-to-Analogconverter
0 °
90 °
Frequency
dBmlevel
Occupied
Signal
Bandwith
Far Out
Noise Level
dBc/Hz
Carrier frequency

Direct Conversion Transmitters (II)
• The benefit of this direct-launch Cartesian encoded carrier is
multi-mode compatibility with baseband frequency bandwidth
and mask determination.
This enables additional digital processing technology to be applied through the
entire transmitter, such as feedforward or predistortion linearization.
• Any form of amplitude, angle, frequency, or any combination
of modulation formats and bandwidths with no exceptions,
including complex non-continuous multi-channel signals.

Direct Conversion Transmitters (III)
• Three main issues:
Sideband noise level
Local oscillator feedthrough
Self-generated interference (LO pulling causes remodulation of the carrier)
• Sideband noise level
In practice, it is introduced when circuit noise is increased in level by the
broadband gain in the transmitter system.
• Local oscillator feedthrough
The transmission gate ring switching mixer can improve carrier feedthrough. With
careful design of the mixer, carrier feedthrough of better than −50 dBc is attainable.
• LO pulling
Shielding, grounding, .etc.

Far-out Sideband Noise Contribution
• Far-out sideband noise can
become an interference to
receivers close to the
transmission signal. (For
GSM, a BPF is often used to
reduce the far-out noise
significantly outside TX bands.)
• The lack of broadband
tunable RF bandpass filters
results in far-out noise over
a very wide range of
frequencies and the TX may
offend a receiver in close
proximity.
Amp
LPF
Amp
LPF
PADifferential
Quadrature
LO
I
Q
0 °
90 °
Gain = G
Low Pass Filter
Reduces Far Our noise contribution
Noise Figure contributes to
Input Referenced Added Noise
Transmission Gate
Switching Mixers
Input
Referenced
Added Noise
Carrier
VCO

LO Frequency Pulling
• DCTs have an output frequency equal to that of the oscillator
signal source frequency.
The interference causes perturbations in the VCO that are not corrected by the PLL
control loop. This undesirable remodulation of the VCO signal frequency will
degrade the quality of the signal transmitted.
Amp
LPF
Amp
LPF
PA
Differential
Quadrature
LO
I
Q
0 °
90 °
Transmitter radiated signal coupled input VCO signal source
Antenna
Network
DC supply and ground
conducted into VCO
signal source network
Electromagnetic Shielding
Carrier
VCO

Remodulation from Pulling
• Overcome Remodulation:
Shielding
Grounding
Decreased VCO sensitivity to electromagnetic signals and the use of
subharmonic, higher harmonic, or translated reference signal frequency.
Lowering the inductive and capacitive coupling coefficient of the VCO resonant
network, use of differential VCO, and integrated implementation with a lower
coupling area profile.
• These are combined with multiple layers of isolation shielding
between the antenna and the VCO to form a remodulation
rejection system.

Required Isolation in ICs
Substrate
modulator PA
LO
ωLO
paraC
PLL
synthesizer
Isolation > 90~110 dB
PA < 30 dBm (1W)
LO < 10 dBm
In the experiment, LO phase noise degrades when the injection power is
as low as −80 dBm.

Substrate Coupling and Isolation
• Dominant
Diffusion capacitive coupling
Impact ionization
Inductive coupling (power grid fluctuations)
• Less significant
Gate-induced drain leakage (GIDL)
Photon-induced reverse current
Diode junction leakage current

Diffusion Capacitive Coupling
•
SPICE models such elements with "CJ0" and "CJSW" (source/drain-to-
substrate capacitance).
• Metal-to-metal capacitors:
Largest parasitic capacitance to the substrate, hence if these devices are used for
implementing large on-chip capacitors, they can act as significant substrate noise-
injectors.
• As technology feature size reduces,
higher doping concentration leads
to higher depletion capacitance and
hence more coupling effects.
( )
1 2
1 22
js
b
q N N
C
V N N
ε
ψ
 
=  
+ + 

Impact Ionization
• Reduced transistor feature sizes increase the electric field in the
channel and therefore impact ionization currents are becoming more
significant compared to other injection mechanisms.
• In saturation, impact ionization takes place with a high electric field
in the depleted region. For a p-type substrate, the generated holes
are swept to the substrate generating an effective drain-to-substrate
current. Recent experimental evidence suggests that hot-electron
induced substrate currents are the dominant cause of substrate noise
in NMOSFETs up to at least one hundred megahertz.
• Shorter device channel lengths in advanced technologies are likely
to increase the impact ionization currents due to increased channel
fields and smaller oxide thickness and drain junction depth.

Inductive Coupling - Power Grid Fluctuations
• Due to parasitic effects (mainly bond wire inductance), power
supply lines become very noisy because of currents drawn by
the switching digital circuits. These currents induce large
voltage glitches when they switch (Ldi/dt noise) at substrate
and well contacts. In addition, the power grid noise can be also
capacitively coupled through metal-to-substrate parasitic
capacitance.

Isolation in Silicon Substrate (Baseline)
• The baseline:
D = 120 µm
Isolation ~ 29 dB
As the frequency increases, the
isolation is getting more and more
worse.
In the following slides, some isolation
techniques were applied to compare the
isolations.
Baseline Isolation

Isolation Techniques – P+ Guard Ring
• P+ ring: D = 120 µm
W = 3 µm / d = 10 µm
Isolation ~ 65 dB
• Guard rings sink the noise currents
P+ ring w/ low ohmic contact Isolation w/ P+-ring

Isolation Techniques – N+ Guard Ring
• N+ ring:
D = 120 µm
W = 3 µm / d = 10 µm
Isolation ~ 65 dB
• Good isolation at low frequencies due to the high capacitive
impedance of the p-n junction between n-ring and p-sub.
Isolation w/ N+-ring

Isolation Techniques – Deep N-Well Ring
• DNW ring:
D = 120 µm
W = 3 µm / d = 10 µm
Isolation ~ 90 – 70 dB
• Good isolation at low freq.
• The DNW isolation
degrades with increasing
the frequency slower than
the n-well due to that
DNW is lightly doped
than the regular n+ well.(p-
n junction capacitance with the p
substrate is smaller than that of the
n+ well)
Isolation w/ DNW N+-ring

Isolation Techniques – Deep Trench
• Deep trench:
D = 120 µm
W = 3 µm / d = 10 µm
Isolation ~ 65 dB
• A deep trench is a trench in the
silicon substrate approximately
10 µm deep that is filled with
oxide.
• The oxide in the deep trench
acts as a high impedance
insulator that forces the
substrate noise current to dive
deep in the substrate.

Isolation v.s. Distance D – Baseline

Isolation v.s. D – P+ Guard Ring

Isolation v.s. Ring Enclosure d

Isolation v.s. Ring Enclosure Width w
Department of Electronic Engineering, NTUT4582

Adopt the Offset PLL
• Using an offset PLL eliminates remodulation by increasing the
PLL loop bandwidth to include the signal modulation radiated.
0 °90 °
Quad Generator
ReferencePhase
Frequency
Detector
Narrow band
LPF Synthesizer
control
Offset VCO
Ft or 2*Ft
F = Ft or 2*Ft +/− Ft
Fr
Very
Wideband
LPF
Carrier
VCO
control
Ft or 2*Ft

Using DDS
• An alternative direct-launch architecture that does not have a
VCO operating at the transmitter output frequency uses direct
digital signal synthesis (DDS).
• Briefly stated, a high-frequency clocking signal is used to
generate an output signal source without the use of an
oscillator operating at the output frequency. DDS can be an all-
band signal source for SDR, assuming that it is technically
practical for up to 6-GHz operation with acceptable power
dissipation.

Cartesian and Polar Implementation
• The advantage of polar processing is direct phase encoding on
the signal source and the potential of an efficiency
enhancement implementation in the amplitude modulation.
First, the bandwidth associated with the magnitude and phase signals are multiples
of the Cartesian equivalent signals.
Second, the magnitude and phase terms are very different, which causes divergent
signal processing effects, including potential time alignment imperfections. These
bandwidth and time alignment effects require additional complexity and
consideration for each mode of operation.
Quadphase - Q
Q
Magitude =
( ) ( )
1/22 2
= I t +Q t  
InPhase - I
Cartesian
( )A t
( ) ( ) ( )Phase= t = arctan Q t /I tθ   
( )v t
Q
90°
-90°
180°
( )A t
( )tθ
( )v t
I
0°
Polar

RF Power Amplification (I)
• Power Sources:
Portable equipment: < 4 W of peak power (3.6- to 9-V dc battery)
Fixed-base station equipment: < 100 W of peak power (110-V ac source)
Vehicle mobile class: 10-W or higher (12-V dc battery)
• As the number of modes and bands increases, the size, cost,
and performance of a bank of single solutions will become
prohibitive without technology advancement in the passive
frequency-determining elements needed for matching at each
port of the power transfer gain stages within the transmitter
system.

RF Power Amplification (II)
• Combining bands to expand the RF PA across applications
with an acceptable compromise of optimized single-solution
performance.
• Multi-mode operation would be divided between TDD or FDD.
• The TDD switches between transmitter and receiver operation
modes, where only one is active at any given time.
Amp
LPF
Amp
LPF
Differential
Quadrature
I
Q
0º
90º
PA
Tx RxF = F
Mulitiplexer
Amp
LPF
RxFDifferential
Quadrature
LNA
0º
90º
Amp
LPF
I
Q
&Analog-to-Digitalconverter
TxF

RF Power Amplification (III)
• The FDD has simultaneous transmitter and receiver operation
at different frequencies. Another incremental step would use
programmable frequency-matching or device- operating
conditions to expand the band or mode of application
associated with a common RF power amplifier implementation.
Amp
LPF
Amp
LPF
Differential
Quadrature
I
Q
0º
90º
PA
Tx RxF = F
Duplexer
Amp
LPF
RxFDifferential
Quadrature
LNA
0º
90º
Amp
LPF
I
Q
&Analog-to-Digitalconverter
TxF

RF Power Amplification (IV)
• The RF signal levels associated with power amplifiers can
reach levels greater than the dc voltage source used for
program control.
• If the RF signal voltage is greater than that of the dc control
range of the varactor, its capacitance is a function of the RF
signal in combination with the dc control voltage.
The capacitance is a function of the RF signal and is no longer constant at all times.
This can result in modulation of the programmable element’s impedance value and
distortion in the RF signals.

RF Power Amplification (V)
• A single RF PA would be an RF PA with continuous operation
across all frequencies and optimized power dissipation at
every multi-mode format across all operating power levels. In
addition, it would provide acceptable linear performance and
harmonic content for any mode or band of operation.
• As the bandwidth approaches from 100 MHz to 6 GHz, a
cascade of wide bandwidth-matching network gain stages
becomes a complex design. Programmable elements could
become part of the solution to provide a design that would
compete successfully with a band of multi-mode or band-
optimized performance solutions.
• However, a vector combined distributed implementation
(distributed amplifier) can provide wideband performance with
a modest increase in complexity.

Transmitter Efficiency
• A linear class B amplifier peak power occurs ideally when the
peak output voltage is equal to that of the dc supply voltage:
• A modulation format with a peak-to-average ratio of 3 dB
would have an efficiency reduction by a factor of 2.
• Supply Modulation:
Modulating the dc supply voltage as a function of the encoded output power
magnitude to provide peak operating efficiency at all power levels. There are a
number of supply modulation variations, such as envelope following, envelope
elimination and restoration, and polar modulation format.
0.785
4 4
out out
in dc
P V
P V
π π
η = = = =

Transmitter Linearization
• Error vector magnitude (EVM) and adjacent channel power
ratio (ACPR) are used to measure the performance.
• ACPR:
A measure of the unintended generation of electromagnetic energy from the
transmitter network into frequency bands adjacent to the intended operating
frequency band.
• A transmitter frequency-domain mask is defined by standards
to limit transmitter adjacent channel interference signal level.
The source of the unwanted adjacent channel energy is
nonlinear distortion products within the RF power amplifier.

Reducing Nonlinear Distortion
• Reducing the output power reduces the ACPR at the expense
of RF power amplifier efficiency, which is not always a
practical solution.
• Linearization adds complexity to the amplifier to compensate
or cancel generation of the distortion components.
Linearization Tech. Advantages Disadvantages
Feedback
35 dB improvement
Not depend on carrier frequency
Narrowband, < 1 MHz
Instability potential
Dependent on output termination
Feed-forward
35 dB improvement
Not depend on carrier frequency
Wideband < 100 MHz
Efficiency performance
Complexity
Predistortion
Reduced hardware
Table-based
Wideband < 10 MHz
Limited improvement (~15 dB)

Transmitter Stability
• When a circuit becomes unstable, it produces output signals at
frequencies not represented within the input signal.
The most common form of unstable behavior in a circuit is positive feedback, where
the output is coupled to the input at a level higher than the original input signal. As
the bandwidth of operation increases, these unintended feedback paths become
more difficult to avoid.
• When an RF power amplifier is working, the operating
condition is changing as a function of the input signal level.
Therefore, the s-parameters are time-varying functions,
making complete stability analysis more difficult to define.

Broadband LO Generation
• Perhaps the greatest challenge for SDRs is the generation of
LO oscillator signals over broad, continuous frequency ranges.
• Given that direct conversion is the receiver topology of choice,
quadrature generation must be part of the solution. This is an
area that requires innovation to achieve SDR performance.

Phase-Locked Loops (I)
• PLLs are the most common implementations of frequency
synthesizers. A VCO is phase-locked to a stable reference
frequency (typically, a xtal) through a feedback path.
VCO architectures: Ring oscillators have found applications in some wireless
LAN standards and broadband TV tuner applications. However, the LC-tuned
oscillator is most commonly used in applications with stringent phase noise
requirements.
• In addition to the benefits of the PLL integration into CMOS
processes, they typically exhibit good performance in terms of
phase noise, current drain, area, and spurious performance.
The greatest challenge for PLLs is making them tunable over a broad
frequency range. Tuning ranges of 20% are typical but can be as high as 30%.
Recent results suggest that ranges approaching 50% are possible.

Phase-Locked Loops (II)
• Even a 50% tuning range is not enough, there are a multitude
of approaches for extending the frequency range of PLL
systems. One approach is to have multiple VCOs, which in
most cases can share the same PLL circuitry.
• The size of inductors places a practical limit on the number of
VCOs and therefore the achievable frequency range. Whether
on- or off-chip, cost and manufacturing issues prevent the use
of huge banks of VCOs to cover wide tuning ranges.
• Another way to get a broad tuning range is to have one or
more VCOs and multipliers, dividers, or mixers combinations.
Inevitably, the addition of these circuits comes at the cost of higher power
consumption for equivalent noise and spurious performance.

Direct Digital Synthesizer (DDS)
• DDSs have a broad frequency tuning range, fine frequency
resolution, and very fast switching
• ROM consumes a large amount of power.
• Synthesized frequency is lower than the reference frequency.
Acc. Output
ACC
n m
LPF outF
refF
DACROM
ROM Output DAC Output
Acc.Output
ROMOutput
DACOutput
outF

Digital-to-Time Converter
• Use of a digital-to-time converter (DTC) to construct an output
frequency from the phase information in the accumulator to
lower power consumption.
Acc. Output
ACC
K
n m
Tap0
TapX
Phase
Detector
Charge
Pump
LPF
vtuneTapped Delay Line
Tap0 Tap1 Tap2 …… TapX-1 TapX
Tap Selection Logic
……
Digital-to-Time Converter
outF
refF

Example (I)
• A highly reconfigurable low-power transceiver implemented in
a 90-nm CMOS process.
• The RFIC processes signals of multiple wireless protocols
from 100 MHz to 2.5 GHz with −6 dBm and a voltage gain of
48 dB.
• The transmitter has better than 40 dB of carrier suppression,
35 dB of sideband suppression, and an EVM of 1% at 800
MHz.
• The frequency synthesizer uses direct digital synthesis to
achieve instantaneous frequency switching and a phase noise
of −115 dBc/Hz at 25 kHz offset for a 500-MHz carrier
frequency.

Rx DDS Reference
PLL/VCO
PMA VGA BQ
DCOC MUX
Tx TEST POINTS
SPI
ButterworthForward pole 2 Input Buffer
Tx Forward DDS
ReferenceTx Reverse DDSCartesian Rev Amp/Mixer
Cartesian BB Forward
Reference
Example (II)
Programmable LPF, 4
kHz ~ 10 MHzDDS
DDS
DDS
PLL
DCR
DCT
Cal.
Cal.
external connection to
an ADC and digital
processing.
external connection to
an DAC and digital
processing.
Programmable LPF, 4
kHz ~ 10 MHz, 10% BW
step
90 dB VGA power
control
For
external
LNA
Chopping

Quadradture Mixers
• The quadrature mixers on RX inputs 1, 3, and 5 are
nonchopped passive mixers built with a quad ring of CMOS
transmission gates.
• The quadrature mixers on RX inputs 2 and 4 use dynamic
matching to improve IP2, flicker noise, and dc offset. The
chopping mixers are built with three mixers in, where each
mixer is built with a quad ring of CMOS transmission gates.
RFp
LOm OUTp LOp OUTm
RFm
RFp
RFm
CHOPp
CHOPm
LOp
LOm
OUTm
OUTp

Baseband Filters (I)
• Baseband filters that support multiple bandwidths are
implemented along with gain control and dc offset correction.
• A filter bandwidth is programmable from 4 kHz to 10 MHz in
6.25% steps or less. Sufficient margin is built into the design
to allow for a 20% change in RC tolerance and still maintain
the bandwidth range of 4 kHz to 10 MHz.
• Bandwidth selection is implemented by adjusting the resistor
and capacitor values in the filter design.

Baseband Filters (II)
• Baseband filter gain control is accomplished at three points:
A programmable resistor divider at the input of the PMA allows attenuation in
four 6-dB steps.
The PMA has a maximum gain of 32 dB and a minimum gain of −10 dB.
The VGA has a gain range of 8 dB, and the output buffer has a programmable
gain control of 0 to 18 dB in 6-dB steps.
The entire baseband filter lineup has a maximum gain of 64 dB and a minimum
gain of −4 dB.
• A notable feature of the baseband filter is the use of chopper
stabilization to mitigate the undesirable effects that occur in
direct-conversion receivers when designed in a CMOS process.

Chopper Stabilization
• Chopper stabilization is
implemented around the first-stage
amplifier of each two-stage op-amp
(OPA’s input-referred voltage offset
and flicker noise performance are
heavily dependent on the first stage
of the OPA).
• The chopper frequency is derived
from the crystal input and can be
selected as a divide by 1, 2, 4, or 8
of the crystal frequency. Flicker
noise is essentially eliminated when
chopping is enabled, and thus
narrowband protocols will see
improvement in receiver sensitivity.

DC Offset Correction
• Dc offset correction circuitry (DCOC) is implemented as a
complete control loop that corrects dc offsets automatically at
the output of the baseband filter.
• DCOC consists of a 1-bit ADC (comparator), control logic,
and a 5-bit current-mode DAC that injects current into the
feedback resistors of the VGA to adjust the offset voltage.
• The control logic implements a successive approximation
algorithm that converges on the correct 5-bit word that
compensates for the filter’s dc offset.

Performance of This Transceiver
Summary of the Transceiver Performance
Frequency range 100 MHz ~ 2.5 GHz
RX NF 7 dB
RX gain 48 dB
RX IIP2 +60 dBm
RX IIP3 -6 dBm
RX current 40 mA
TX output power +6 dBm
TX sideband suppression 35 dBc
TX current 40~90 mA
EVM (pi/4 DQPSK 3.5 Msps) 1%@800 MHz
LO phase noise −115 dBc/Hz@25 kHz
LO frequency resolution 15 Hz
LO current per DDS 80 mA

Adaptive Multi-mode RF Front-ends
• To provide various services from different wireless
communication standards with high capacities and high data
rates, integrated multi-functional wireless devices are required.
• In the current multi-standard scenario, transceivers are mostly
implemented by replicating the radio-frequency (RF) front end
for each operating standard and by sharing partially the analog
baseband circuitry, but with a number of additional switches.
Although this approach allows for an optimal performance optimization across the
bands, the increase in hardware required to implement such a multifunctional
wireless device increases the total silicon area and cost and may reduce the use
time compared to single-standard implementations.

Sharing Building Blocks
• By sharing building blocks between different applications and
standards, portable wireless devices potentially gain advantage
over existing devices:
They use a smaller chip area and have a potential for lower overall cost. This
requires the development of adaptive circuits and systems that are able to trade off
power consumption for performance on the fly.
Realization of adaptivity functions requires scaling of current consumption to the
demands of the signal processing task.

Adaptive Multi-mode Low-power Design
• Mobile wireless equipment today is shaped by user and
application demands and RF microelectronics.
• Main drivers for mobile wireless devices are related to cost,
which depends on volume of production, size of mobile units,
engineering bill of materials, power consumption, and
performance.
Power consumption depends on available frequency spectrum, functionality, and
performance.
Performance depends on applications, standards, and protocols. Wireless systems
for new applications require an extension of the capabilities for the RF devices of
today, creating an opportunity for low-power adaptive and multifunctional RF ICs.

Low-power and Adaptive RF Circuit
• A variety of applications:
Supporting the transfer of text, audio, graphic, and video data, maintaining
connection with many other devices, position aware, and perhaps wearable.
• A combination of multiple functional requirements and limited
energy supply from a battery is an argument for the design of
both adaptive low-power hardware and software.
• An adaptive design approach poses unique challenges:
From hardware design to application software, and ultimately throughout all layers
of the underlying communication protocol.

Adaptive Topology
adaptive analog
RF front-end
LNA
I-mixer
Q-mixer
Quadrature
generation
VCO
VGA
VGA
A/D
A/D
DSP
Memory
CPU
adaptive analog base-band adaptive digital
back-end
( )x t
( )y t
( )I t
( )Q t
Setting the performance parameters of an RF front end by means of adaptive circuitry is a way
to manage power consumption in the RF path of a receiver. An adaptive LNA, an adaptive
mixer, and an adaptive VCO allow more efficient use of scarce battery resources.
Furthermore, adaptive analog baseband and digital back-end
circuits enable complete hardware adaptivity (monitoring and
adjust TRX parameters).

Multi-mode and Adaptive RF Circuit (I)
• GSM, UMTS, Bluetooth, 802.11a/b/g, GPS, and DVB-H are
some of the standards likely to be present in the multi-standard,
multi-mode, multi-band mobile terminals of the future.
• The design of multi-functional wireless devices is
accompanied by various challenges:
System challenges:
Single high-performance, low-power terminal that is cheaper than a
compound of separate single-mode terminals.
Circuit design challenges:
For full integration of multifunctional devices include on-chip image
rejection and provision of wide bandwidth and dynamic range.
Technological challenges include the integration of low-cost and high-
performance-scaled silicon devices on a chip.

Multi-mode and Adaptive RF Circuit (II)
• Multi-standard modules can be implemented in various ways:
As stand-alone circuits that are designed for the worst-case condition of the
most demanding standard.
As multiple circuits (i.e., one per standard). Even though simpler to implement,
this approach requires more silicon area. Moreover, when multiple standards
operate simultaneously, power consumption increases.
As stand-alone adaptive circuits. When different standards do not operate
simultaneously, circuit blocks of a multi-mode handset can be beneficiary shared,
offering power and area savings compared to other multi-standard receiver
implementations, such as multi-standard receivers implemented using circuits
designed for the worst-case condition and multi-standard receivers implemented
with one receiver circuit per standard.

Multi-mode and Adaptive RF Circuit (III)
• For adaptive LNAs and mixers, power consumption is traded
off for dynamic range, whereas adaptive oscillators trade off
power consumption for phase noise and oscillation frequency.
• After a signal is down-converted to the baseband, it is filtered,
amplified, and digitized.
To accommodate multiple radio standards with different bandwidths and
modulation schemes, multi-mode LPFs need to compromise bandwidth, center
frequency, selectivity, and group delay for optimal dynamic range and power
consumption.
Multi-mode ADCs have to sample signals belonging to different standards,
tailoring different sample rates, dynamic range, and linearity requirements.

Multi-mode Receiver Concept (I)
• Wireless devices may use a common receiver if the protocols
of the radio standards support intersystem operability.
DCS1800
LNA
LNA
LNA
WCDMA
WLAN,DECT
Bluetooth
MMA-QD IC
I-IF
Q-IF
VCO
buffer
buffer
2-stage
Polyphase
filter
Differential
amplifier
Differential
amplifier
I-mixer
Q-mixer
Impedance matching, packaging,
and prefiltering requirements
are relaxed and simplified by
using multiple LNAs.
An RF switch selects
the mode of interest.
If the VCO and mixer
performance is adequate
to cover the range of
signals anticipated for
each application, the
quadrature downconverter
enables a multi-standard
receiver realization with a
single circuit block
(multi-mode adaptive
quadrature down-
converter, MMA-QD IC).

Multi-mode Receiver Concept (II)
• Adaptivity to
Requirements for Various Standards Referred to LNA Input
DCS1800 WCDMA WLAN Bluetooth DECT
f0 (GHz) 1.8 2.1 2.4 2.4 2.4
NF (dB) 9 6 10 23 18
IIP3 (dBm) −9 −9 −12 −16 −20
PN@1MHz (dBc/Hz) −123 −110 −110 −110 −100
Receiver Noise and Linearity Specification per Mode of Operation
Specification Demanding mode
DCS1800/WCDMA
Moderate mode
WLAN 802.11b
Relaxed mode
BT/DECT
NF (dB) 6 10 18
IIP3 (dBm) −9 −19 −16
PN@1MHz (dBc/Hz) −123 −110 −100

Multi-mode Receiver Concept (III)
• Referring to the channel spacing of the standards considered,
zero-IF and low-IF receiver configurations may be supported.
For example, the multi-mode adaptive quadrature down-
converter may operate in zero-IF mode for all standards
considered except the 200-kHz narrowband GSM (DCS1800
band) standard where low-IF operation would be favored (due
to flicker nosie).
• The standards considered are chosen to illustrate the feasibility
of the adaptivity design concept for multi-mode receivers.

Multi-mode Receiver Concept (IV)
• Given the multi-mode receiver requirements and the
specifications for the LNA and baseband circuitry, the noise
figure and linearity performance of the quadrature down-
converter can be determined for each mode of operation using
the cascaded NF and IIP3 formulas.
The demanding-mode performance is met with a 0-dB gain of the down-converter
with an accompanying NF tuning range (NFTR) of 14.6 dB and an IIP3 tuning
range (IIP3TR) of 7.6 dB. Note that by trading off the performance of the LNA and
baseband circuitry, a different (more relaxed or more demanding) set of down-
converter requirements results.
Required Performance for the Multi-mode Quad-Downconverter for 0 dB of Gain
Specification Demanding mode
DCS1800/WCDMA
Moderate mode
WLAN 802.11b
Relaxed mode
BT/DECT
NFqd (dB) 12.7 19.75 28.8
IIP3qd (dBm) 6.74 3.35 −0.87

Multiband Transceivers - [Chapter 6] Multi-mode and Multi-band Transceivers

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