Personal Information
Organization / Workplace
Japan Japan
Occupation
Tokyo Institute of Technology ー Associate Professor
Industry
Education
Website
www.hirokinakahara.sakura.ne.jp/
About
FPGA developments for a packet classification, a regular expression matching, a radio telescope, multi-valued logic based processor, and a deep neural network computing.
Tags
fpga
altera
de0
verilog-hdl
deep learning
deep neural network
binarized cnn
cnn
embedded system
yolov2
machine learning
rns
object detector
random forest
altera sdk for opencl
radio telescope
high-level synthesis
niosii
processor
cloud computing
high-performance computing
multi deep learning
ros
high performance computing
compression
ternary logic
binary cnn
guinness
gpu
mdd
multiple-valued logic
high level synthesis
tensorflow
binary neural network
fpgax
dqn
fft
digital spectrometer
astronomy
imagenet
vivado hls
nes
See more
Presentations
(37)Likes
(69)Xilinx data center_ibm_meetup_20191023
Yoshihiro Horie
•
4 years ago
チンパンジーの姿勢推定:教師データがないときの工夫
NgocGiang14
•
4 years ago
ICCV 2019 論文紹介 (26 papers)
Hideki Okada
•
4 years ago
Tensor コアを使った PyTorch の高速化
Yusuke Fujimoto
•
4 years ago
SDSoC勉強会_170128_スライド「SDx 2016.3のプラグマによるハードウェアと性能」
marsee101
•
7 years ago
ConvNetの歴史とResNet亜種、ベストプラクティス
Yusuke Uchida
•
7 years ago
モデルアーキテクチャ観点からのDeep Neural Network高速化
Yusuke Uchida
•
6 years ago
画像認識のための深層学習
Saya Katafuchi
•
9 years ago
畳み込みニューラルネットワークの高精度化と高速化
Yusuke Uchida
•
4 years ago
ICLR2018におけるモデル軽量化(ICLR2018読み会@ PFN)
tomohiro kato
•
5 years ago
3D CNNによる人物行動認識の動向
Kensho Hara
•
6 years ago
Semantic segmentation
Takuya Minagawa
•
7 years ago
Windows8でOpenCVを使ったAndroid(MOVERIO)開発体験したい
Yukio Saito
•
9 years ago
畳み込みニューラルネットワークの研究動向
Yusuke Uchida
•
6 years ago
Artificial Neural Networks Lect1: Introduction & neural computation
Mohammed Bennamoun
•
7 years ago
FPGA+SoC+Linux実践勉強会資料
一路 川染
•
6 years ago
スタートアップ共同創業者の見つけ方、付き合い方、別れ方
Takaaki Umada
•
9 years ago
Simple perceptron by TJO
Takashi J OZAKI
•
11 years ago
サーベイ論文:画像からの歩行者属性認識
Yasutomo Kawanishi
•
8 years ago
Vivado hls勉強会1(基礎編)
marsee101
•
8 years ago
合成変量とアンサンブル:回帰森と加法モデルの要点
Ichigaku Takigawa
•
6 years ago
最近のSingle Shot系の物体検出のアーキテクチャまとめ
Yusuke Uchida
•
6 years ago
高速な物体候補領域提案手法 (Fast Object Proposal Methods)
Takao Yamanaka
•
8 years ago
[サーベイ論文] Deep Learningを用いた歩行者検出の研究動向
Hiroshi Fukui
•
7 years ago
画像認識モデルを作るための鉄板レシピ
Takahiro Kubo
•
7 years ago
Abstracts of FPGA2017 papers (Temporary Version)
Takefumi MIYOSHI
•
7 years ago
有名論文から学ぶディープラーニング 2016.03.25
Minoru Chikamune
•
8 years ago
SSD: Single Shot MultiBox Detector (ECCV2016)
Takanori Ogata
•
7 years ago
Zynq + Vivado HLS入門
narusugimoto
•
9 years ago
IIBMP2016 深層生成モデルによる表現学習
Preferred Networks
•
7 years ago
Personal Information
Organization / Workplace
Japan Japan
Occupation
Tokyo Institute of Technology ー Associate Professor
Industry
Education
Website
www.hirokinakahara.sakura.ne.jp/
About
FPGA developments for a packet classification, a regular expression matching, a radio telescope, multi-valued logic based processor, and a deep neural network computing.
Tags
fpga
altera
de0
verilog-hdl
deep learning
deep neural network
binarized cnn
cnn
embedded system
yolov2
machine learning
rns
object detector
random forest
altera sdk for opencl
radio telescope
high-level synthesis
niosii
processor
cloud computing
high-performance computing
multi deep learning
ros
high performance computing
compression
ternary logic
binary cnn
guinness
gpu
mdd
multiple-valued logic
high level synthesis
tensorflow
binary neural network
fpgax
dqn
fft
digital spectrometer
astronomy
imagenet
vivado hls
nes
See more