Ram Vuta

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SOC/ASIC design/verification IP verification Power management flows - ACPI in intel Chipsets/processors, mobile chipsets Intel Chipsets and CPU complex feature/architecture verification 3d Graphics interface PCIe/DMI/DDR protocols Read Channel IP ( signal processing in HDD) Specialties: • SOC verification, • Constrained random verification using SystemVerilog and Specman/e, VERA, SVA • solid understanding of intel chipsets, • ECO execution, • Shell and perl scripting, • Good understanding of PCIE protocol, • Assembly tests/programming, • 3d graphics flows, • Low power and power management techniques • RVM/AVM/OVM/UVM methodologies • Signal processing architectures

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Ram Vuta

CMOS Topic 5 -_cmos_inverter

Low Power Techniques

Low power vlsi design ppt

AMBA3.0 james_20110801

Cracking Digital VLSI Verification Interview: Interview Success

SMT Verification of the POWER5 and POWER6 High-Performance Processors

Using Assertions in AMS Verification

Verification Automation Using IPXACT

The Cortex-A15 Verification Story

Experience with Formal Methods, Especially Sequential Equivalence Checking

Advanced Methodologies Used for Top-Level Verification of Mixed Signal Products

PCI Express Verification using Reference Modeling

Intel Atom Processor Pre-Silicon Verification Experience

Efficient Migration of Verilog Testbenches to 'UVM' Keeping the Functionality Intact

Pre-Si Verification for Post-Si Validation

Low Power Design and Verification

Stop Writing Assertions! Efficient Verification Methodology

UVM Ral model usage

SystemVerilog Assertions verification with SVAUnit - DVCon US 2016 Tutorial

Uvm dcon2013